JPS6441028A - Interruption processing system - Google Patents
Interruption processing systemInfo
- Publication number
- JPS6441028A JPS6441028A JP19700987A JP19700987A JPS6441028A JP S6441028 A JPS6441028 A JP S6441028A JP 19700987 A JP19700987 A JP 19700987A JP 19700987 A JP19700987 A JP 19700987A JP S6441028 A JPS6441028 A JP S6441028A
- Authority
- JP
- Japan
- Prior art keywords
- interruption processing
- register
- instruction
- saved
- address
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE:To improve the interruption processing efficiency by securing at least the double structure or more for all working registers and switching these registers when data attending with the interruption processing are saved and restored. CONSTITUTION:An address register AR31, a temporary register TR32, a pipeline register PR33 and a working register WR34 are switched with each other with input of a register saving instruction signal 30 from an instruction control circuit 2. Then data are saved and at the same time an idle register is prepared for the interruption processing. At the same time, a program counter PC9 interrupts the normal processing with the input of an interruption processing start signal 5 and outputs an interruption processing address 7 to an instruction memory 14 after saving an instruction address 11 into a stack STK10. Then the interruption processing is started. In such a constitution, the interruption processing is possible as long as the timing matching operation is possible even in a working mode of a pipeline. Furthermore the data can be saved automatically and all at once just by switching those registers having at least the double structure or more by the signal 30.
Priority Applications (17)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19700987A JPS6441028A (en) | 1987-08-06 | 1987-08-06 | Interruption processing system |
DE3851858T DE3851858T2 (en) | 1987-06-05 | 1988-06-01 | Digital signal processor. |
DE3856219T DE3856219T2 (en) | 1987-06-05 | 1988-06-01 | Digital signal processor with address generator for accessing data from a two-way area of a data memory |
DE3856220T DE3856220T2 (en) | 1987-06-05 | 1988-06-01 | Digital signal processor that processes conditional multipoint jump commands in pipeline mode |
EP93104196A EP0551932B1 (en) | 1987-06-05 | 1988-06-01 | Digital signal processor processing multi-point conditional branch operations in a pipeline mode |
EP93104194A EP0554917B1 (en) | 1987-06-05 | 1988-06-01 | Digital signal processing system having two instruction memories accessed by a processor under control of host |
EP19930104197 EP0551933A3 (en) | 1987-06-05 | 1988-06-01 | Digital signal processor |
EP93104238A EP0551934A2 (en) | 1987-06-05 | 1988-06-01 | Digital signal processor |
DE3856175T DE3856175T2 (en) | 1987-06-05 | 1988-06-01 | Digital signal processing system in which a processor accesses two command memories under the control of a host |
EP88108755A EP0293851B1 (en) | 1987-06-05 | 1988-06-01 | Digital signal processor |
EP93104195A EP0551931B1 (en) | 1987-06-05 | 1988-06-01 | Digital signal processor comprising address generator accessing data stored in bidirectional space of data memory |
US07/201,208 US5045993A (en) | 1987-06-05 | 1988-06-03 | Digital signal processor |
CA000568527A CA1288169C (en) | 1987-06-05 | 1988-06-03 | Digital signal processor |
US07/755,503 US5237667A (en) | 1987-06-05 | 1991-08-27 | Digital signal processor system having host processor for writing instructions into internal processor memory |
US07/750,512 US5206940A (en) | 1987-06-05 | 1991-08-27 | Address control and generating system for digital signal-processor |
US07/750,408 US5222241A (en) | 1987-06-05 | 1991-08-27 | Digital signal processor having duplex working registers for switching to standby state during interrupt processing |
US07/750,478 US5247627A (en) | 1987-06-05 | 1991-08-27 | Digital signal processor with conditional branch decision unit and storage of conditional branch decision results |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19700987A JPS6441028A (en) | 1987-08-06 | 1987-08-06 | Interruption processing system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6441028A true JPS6441028A (en) | 1989-02-13 |
Family
ID=16367268
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19700987A Pending JPS6441028A (en) | 1987-06-05 | 1987-08-06 | Interruption processing system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6441028A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1994006075A1 (en) * | 1992-08-31 | 1994-03-17 | Fujitsu Limited | Method and apparatus for non-numeric character discrimination |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5398753A (en) * | 1977-02-09 | 1978-08-29 | Nippon Telegr & Teleph Corp <Ntt> | Interrupt processing system |
-
1987
- 1987-08-06 JP JP19700987A patent/JPS6441028A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5398753A (en) * | 1977-02-09 | 1978-08-29 | Nippon Telegr & Teleph Corp <Ntt> | Interrupt processing system |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1994006075A1 (en) * | 1992-08-31 | 1994-03-17 | Fujitsu Limited | Method and apparatus for non-numeric character discrimination |
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