JPS5557967A - Timer coincidence method for multiple-computer system - Google Patents

Timer coincidence method for multiple-computer system

Info

Publication number
JPS5557967A
JPS5557967A JP13046978A JP13046978A JPS5557967A JP S5557967 A JPS5557967 A JP S5557967A JP 13046978 A JP13046978 A JP 13046978A JP 13046978 A JP13046978 A JP 13046978A JP S5557967 A JPS5557967 A JP S5557967A
Authority
JP
Japan
Prior art keywords
computers
time
timer
interruption
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13046978A
Other languages
Japanese (ja)
Inventor
Yasuo Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP13046978A priority Critical patent/JPS5557967A/en
Publication of JPS5557967A publication Critical patent/JPS5557967A/en
Pending legal-status Critical Current

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Abstract

PURPOSE: To make a timer coincidence among computers, by using a common memory among computers and an interruption input and output among computers.
CONSTITUTION: Six standard time input programs in NO.1 master computer 1 receive periodically time from external timepiece 5. On arrival of the input, corrections of its own timer are made and the time is set in memory 2 as time data 11. Next, interruption 12 is sent to other computers 1. Then, NO.2W(n) computers 1 accept this interruption 12 by time set program 7. This program fetches data 11 in common memory 2 and sets it to its own timer. Consequently, a timer coincidence among computers can be made with only the time delay of the operation time of the program and the reception of the interruption.
COPYRIGHT: (C)1980,JPO&Japio
JP13046978A 1978-10-25 1978-10-25 Timer coincidence method for multiple-computer system Pending JPS5557967A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13046978A JPS5557967A (en) 1978-10-25 1978-10-25 Timer coincidence method for multiple-computer system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13046978A JPS5557967A (en) 1978-10-25 1978-10-25 Timer coincidence method for multiple-computer system

Publications (1)

Publication Number Publication Date
JPS5557967A true JPS5557967A (en) 1980-04-30

Family

ID=15034978

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13046978A Pending JPS5557967A (en) 1978-10-25 1978-10-25 Timer coincidence method for multiple-computer system

Country Status (1)

Country Link
JP (1) JPS5557967A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5812059A (en) * 1981-07-15 1983-01-24 Toshiba Corp Common clock device
JPS5816319A (en) * 1981-07-21 1983-01-31 Hitachi Ltd Time controller of computer system
JPH03127245A (en) * 1989-10-13 1991-05-30 Matsushita Electric Ind Co Ltd Method and device for input/output of information

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5812059A (en) * 1981-07-15 1983-01-24 Toshiba Corp Common clock device
JPS5816319A (en) * 1981-07-21 1983-01-31 Hitachi Ltd Time controller of computer system
JPH0435773B2 (en) * 1981-07-21 1992-06-12 Hitachi Ltd
JPH03127245A (en) * 1989-10-13 1991-05-30 Matsushita Electric Ind Co Ltd Method and device for input/output of information

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