JPS6437847A - Cml type gate array lsi - Google Patents

Cml type gate array lsi

Info

Publication number
JPS6437847A
JPS6437847A JP62194953A JP19495387A JPS6437847A JP S6437847 A JPS6437847 A JP S6437847A JP 62194953 A JP62194953 A JP 62194953A JP 19495387 A JP19495387 A JP 19495387A JP S6437847 A JPS6437847 A JP S6437847A
Authority
JP
Japan
Prior art keywords
terminals
combination
type
gate array
setting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62194953A
Other languages
Japanese (ja)
Other versions
JPH0744258B2 (en
Inventor
Hiroetsu Yamazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62194953A priority Critical patent/JPH0744258B2/en
Publication of JPS6437847A publication Critical patent/JPS6437847A/en
Publication of JPH0744258B2 publication Critical patent/JPH0744258B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/118Masterslice integrated circuits
    • H01L27/11898Input and output buffer/driver structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/544Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54433Marks applied to semiconductor devices or parts containing identification or tracking information
    • H01L2223/5444Marks applied to semiconductor devices or parts containing identification or tracking information for electrical read out
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54473Marks applied to semiconductor devices or parts for use after dicing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54473Marks applied to semiconductor devices or parts for use after dicing
    • H01L2223/5448Located on chip prior to dicing and remaining on chip after dicing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05554Shape in top view being square

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

PURPOSE:To enable the discrimination of types electrically by connecting an input circuit and an output circuit according to the combination of the setting of a plurality of specific different terminals. CONSTITUTION:A CMU output circuit is connected to terminals 1, 2 and a CML input circuit to terminals 3, 4 on the basis of the previously set combination of the specific four terminals 1-4 for a CML type gate array LSI, thus manufacturing a type A. When the combination of the setting of the terminals 1-4 is changed and a type B, a type C... are manufactured and each of the terminals connected to the output circuit and the terminals connected to the input circuit are supplied with constant currents, terminal voltage is made to differ in response to each of an output resistor and an input transistor, the combination of the setting of the terminals is decided and the types are discriminated electrically without sticking labels, etc.
JP62194953A 1987-08-03 1987-08-03 CML type gate LSI Expired - Lifetime JPH0744258B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62194953A JPH0744258B2 (en) 1987-08-03 1987-08-03 CML type gate LSI

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62194953A JPH0744258B2 (en) 1987-08-03 1987-08-03 CML type gate LSI

Publications (2)

Publication Number Publication Date
JPS6437847A true JPS6437847A (en) 1989-02-08
JPH0744258B2 JPH0744258B2 (en) 1995-05-15

Family

ID=16333073

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62194953A Expired - Lifetime JPH0744258B2 (en) 1987-08-03 1987-08-03 CML type gate LSI

Country Status (1)

Country Link
JP (1) JPH0744258B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002045139A1 (en) * 2000-12-01 2002-06-06 Hitachi, Ltd Method for identifying semiconductor integrated circuit device, method for manufacturing semiconductor integrated circuit device, semiconductor integrated circuit device and semiconductor chip

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61274341A (en) * 1984-12-25 1986-12-04 Nec Corp Semiconductor logic device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61274341A (en) * 1984-12-25 1986-12-04 Nec Corp Semiconductor logic device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002045139A1 (en) * 2000-12-01 2002-06-06 Hitachi, Ltd Method for identifying semiconductor integrated circuit device, method for manufacturing semiconductor integrated circuit device, semiconductor integrated circuit device and semiconductor chip
WO2002050910A1 (en) * 2000-12-01 2002-06-27 Hitachi, Ltd Semiconductor integrated circuit device identifying method, semiconductor integrated circuit device producing method, and semiconductor integrated circuit device
US6941536B2 (en) 2000-12-01 2005-09-06 Hitachi, Ltd. Method for identifying semiconductor integrated circuit device, method for manufacturing semiconductor integrated circuit device, semiconductor integrated circuit device and semiconductor chip

Also Published As

Publication number Publication date
JPH0744258B2 (en) 1995-05-15

Similar Documents

Publication Publication Date Title
EP0342131A3 (en) Gate array device having macro cells for forming master and slave cells of master-slave flip-flop circuit
GB1516125A (en) Network which exhibits an output independent of its input supply
JPS6437847A (en) Cml type gate array lsi
JPS5756945A (en) Logic circuit
GB1323711A (en) Electrical networks
JPS5768055A (en) Semiconductor device
JPS5739422A (en) V-i converter
GB1225698A (en)
JPS5650553A (en) Semiconductor device
JPS5640342A (en) Code signal sequential transfer circuit
US4305064A (en) High density analog-to-digital converter
JPS5760853A (en) Semiconductor device
JPS54105441A (en) Exclusive-logical sum circuit
JPS56102124A (en) Electronic switch circuit
JPS561769A (en) Constant current circuit
JPS6444055A (en) Protective circuit
JPS57170621A (en) Comparing circuit
JPS56112778A (en) Josephson line logic device
SU1531157A1 (en) Logic swing shaper
JPS6469107A (en) Inverting circuit
JPS55151806A (en) Signal level control circuit
JPS5478964A (en) Selection circuit
Piguet Logic JK Flip-Flop Structure
JPS57188130A (en) Superconduction periodic timing signal generating circuit
JPS57210724A (en) Switching circuit for state setting