JPS6432677A - Manufacture of field-effect transistor - Google Patents

Manufacture of field-effect transistor

Info

Publication number
JPS6432677A
JPS6432677A JP18937587A JP18937587A JPS6432677A JP S6432677 A JPS6432677 A JP S6432677A JP 18937587 A JP18937587 A JP 18937587A JP 18937587 A JP18937587 A JP 18937587A JP S6432677 A JPS6432677 A JP S6432677A
Authority
JP
Japan
Prior art keywords
gate
trench
oxide film
substrate
shaped
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18937587A
Other languages
Japanese (ja)
Inventor
Yasuaki Inoue
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP18937587A priority Critical patent/JPS6432677A/en
Publication of JPS6432677A publication Critical patent/JPS6432677A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To reduce the rate of an occupying area per one field-effect transistor to the main surface of a substrate by vertically forming the surface of a channel and a gate to the main surface of the substrate. CONSTITUTION:Boron is implanted at multistages where a drain 3, a source 4 and a channel region 5 must be shaped, using a resist 11 as a mask on a P-type substrate 2. An Si oxide film 13 is etched selectively to form a trench 14. The position of the trench 14 is determined so that the trench 14 is brought into contact directly with the channel region 5 at that time. An Si oxide film 15 is shaped onto the inwall surface of the trench 14. The oxide film on the region 5 side of the film 15 is employed as a gate oxide film. A gate electrode material is laminated onto the top face of the substrate 2, and a gate 6 is formed. The drain 3 and the source 4 are shaped through self-alignment, using the gate 6 as a mask. Accordingly, an area per one FET is reduced, thus preventing the positional displacement of a channel section.
JP18937587A 1987-07-28 1987-07-28 Manufacture of field-effect transistor Pending JPS6432677A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18937587A JPS6432677A (en) 1987-07-28 1987-07-28 Manufacture of field-effect transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18937587A JPS6432677A (en) 1987-07-28 1987-07-28 Manufacture of field-effect transistor

Publications (1)

Publication Number Publication Date
JPS6432677A true JPS6432677A (en) 1989-02-02

Family

ID=16240264

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18937587A Pending JPS6432677A (en) 1987-07-28 1987-07-28 Manufacture of field-effect transistor

Country Status (1)

Country Link
JP (1) JPS6432677A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1990013918A1 (en) * 1989-05-12 1990-11-15 Oki Electric Industry Co., Ltd. Field effect transistor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1990013918A1 (en) * 1989-05-12 1990-11-15 Oki Electric Industry Co., Ltd. Field effect transistor
US5281547A (en) * 1989-05-12 1994-01-25 Oki Electric Industry Co., Ltd. Method for manufacturing a field effect transistor

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