JPS6429020A - Phase comparator - Google Patents

Abstract

PURPOSE:To realize a stable phase comparing operation for an input pulse signal with a wide width by generating a reference pulse signal to be given to a phase detection circuit, from four or more pairs of a pulse signal pair, having a phase difference between each other, and the input pulse signal. CONSTITUTION:From a decoder 2, to which the output of a counter 1 to count the four periods portion of the reference pulse phi0 with the period of 2T is inputted, four pairs of the pulse signal pair, consisting of the pulse signals phiA1-phiA4 with the pulse widths of 8T and 2T, and the pulse signals phiB1-phiB4, which correspond to these signals and have the pulse width of 4T, are generated in the phase differences of every 2T between each other. Then, the logical states of the signals phiA1-phiA4 are maintained by hold circuits 31-34, as synchronizing with an input signal train IN within the section of the pulses of the signals phiB1-phiB4 for every pulse pair. The outputs of the hold circuits 31-34 are inputted to the phase detection circuit 5 through a logical sum gate 4, and the phase difference of the signal IN against the output pulse of the gate 4 is detected.