JPS55114062A - Signal regeneration processing system - Google Patents
Signal regeneration processing systemInfo
- Publication number
- JPS55114062A JPS55114062A JP2166179A JP2166179A JPS55114062A JP S55114062 A JPS55114062 A JP S55114062A JP 2166179 A JP2166179 A JP 2166179A JP 2166179 A JP2166179 A JP 2166179A JP S55114062 A JPS55114062 A JP S55114062A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- comparator circuit
- pulse
- differentiated
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Dc Digital Transmission (AREA)
Abstract
PURPOSE: To simplify extraction at a high bit rate by detecting a differentiated pulse, obtained by differentiating a received signal, by a comparator circuit with hysteresis and then by regenerating data and a clock signal by a logic gate and delay line, in a signal circuit which uses a double-current RZ (multi-return-to-zero) signal.
CONSTITUTION: Comparator circuit 16 detects differentiated pulses, obtained by differentiating an input signal, and a comparator circuit output and its inversion output are led out between terminals 17 and 18. With hysteresis characteristics of comparator circuit 16, two differentiated pulses of the same polarity generated continuously are detected as one pulse of width twice that of an isolated pulse without reference to the magnitude of inter-pulse interference of differentiated pulses. Then, data signal 30 and clock signal 35 are obtained by delay line 22 which delays signals by a half as long as the period of the clock, and a logic gate. Thus, the data and clock signal can easily be extracted without reference to inter-pulse interference, by using the comparator circuit with hysteresis characteristics.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2166179A JPS55114062A (en) | 1979-02-26 | 1979-02-26 | Signal regeneration processing system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2166179A JPS55114062A (en) | 1979-02-26 | 1979-02-26 | Signal regeneration processing system |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS55114062A true JPS55114062A (en) | 1980-09-03 |
JPS6313382B2 JPS6313382B2 (en) | 1988-03-25 |
Family
ID=12061216
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2166179A Granted JPS55114062A (en) | 1979-02-26 | 1979-02-26 | Signal regeneration processing system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55114062A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63242047A (en) * | 1987-03-12 | 1988-10-07 | ザ・ボーイング・カンパニー | Receiving coupler for binary data communication system |
-
1979
- 1979-02-26 JP JP2166179A patent/JPS55114062A/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63242047A (en) * | 1987-03-12 | 1988-10-07 | ザ・ボーイング・カンパニー | Receiving coupler for binary data communication system |
Also Published As
Publication number | Publication date |
---|---|
JPS6313382B2 (en) | 1988-03-25 |
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