JPS5614756A - Coding system - Google Patents

Coding system

Info

Publication number
JPS5614756A
JPS5614756A JP9122279A JP9122279A JPS5614756A JP S5614756 A JPS5614756 A JP S5614756A JP 9122279 A JP9122279 A JP 9122279A JP 9122279 A JP9122279 A JP 9122279A JP S5614756 A JPS5614756 A JP S5614756A
Authority
JP
Japan
Prior art keywords
input
inversion interval
coding
bit
state
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9122279A
Other languages
Japanese (ja)
Inventor
Shigeyuki Kawarabayashi
Yasuo Sugiyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP9122279A priority Critical patent/JPS5614756A/en
Publication of JPS5614756A publication Critical patent/JPS5614756A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4906—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes

Landscapes

  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Optical Recording Or Reproduction (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Dc Digital Transmission (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)

Abstract

PURPOSE:To suppress an increase in DC component by performing coding on the basis of the accumulation state of a coding output up to an input of two continuous bits and the state of a coding output right before the input and then by increasing a maximum inversion interval while holding a minimum inversion interval. CONSTITUTION:As for one-bit binary signals ''1'' and ''0'' of an input sequence applied to input terminal 8, binary signal ''0'' is coded into two-bit binary signal ''11'' or ''00'' of bit period T/2, on the basis of the coding state of an input right before it, by modified frequency modulation coder 20 and the obtained signal is output being delayed by time 2T at four-bit buffer circuit 21. This circuit is equipped with ''00''- input detector 22 that detects ''00'' being input, pulse generator 23 that generates pulses of width 2T, memory circuits 24 and 25, and adding-subtracting counter circuits 26 and 27. Then when continuous inputs are coded, the minimum inversion interval is set to bit period T and the maximum inversion interval is set to 3T, suppressing an increase in DC component.
JP9122279A 1979-07-17 1979-07-17 Coding system Pending JPS5614756A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9122279A JPS5614756A (en) 1979-07-17 1979-07-17 Coding system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9122279A JPS5614756A (en) 1979-07-17 1979-07-17 Coding system

Publications (1)

Publication Number Publication Date
JPS5614756A true JPS5614756A (en) 1981-02-13

Family

ID=14020387

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9122279A Pending JPS5614756A (en) 1979-07-17 1979-07-17 Coding system

Country Status (1)

Country Link
JP (1) JPS5614756A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57180757U (en) * 1981-05-06 1982-11-16

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57180757U (en) * 1981-05-06 1982-11-16
JPS6239087Y2 (en) * 1981-05-06 1987-10-05

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