JPS57160246A - Asynchronous binary signal pnm system - Google Patents

Asynchronous binary signal pnm system

Info

Publication number
JPS57160246A
JPS57160246A JP56045029A JP4502981A JPS57160246A JP S57160246 A JPS57160246 A JP S57160246A JP 56045029 A JP56045029 A JP 56045029A JP 4502981 A JP4502981 A JP 4502981A JP S57160246 A JPS57160246 A JP S57160246A
Authority
JP
Japan
Prior art keywords
signal
pulses
circuit
binary signal
pulse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56045029A
Other languages
Japanese (ja)
Inventor
Toshitaka Tsuda
Takafumi Nakajo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56045029A priority Critical patent/JPS57160246A/en
Publication of JPS57160246A publication Critical patent/JPS57160246A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4902—Pulse width modulation; Pulse position modulation

Landscapes

  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)
  • Optical Communication System (AREA)

Abstract

PURPOSE:To achieve encoding with low power consumption by decreasing a mark rate by representing the 1 and 0 of an synchronous binary signal by the numbers of pulses, and generating the pulses at a certain period even when a signal having the same polarity continues. CONSTITUTION:An original signal and a delay signal passed through a delay circuit 1 are applied to an EX-OR circuit 5 to detect anticoincidence and a pulse with pulse width T4 is generate at every change point of the original signal. This pulse is inverted and applied to a delay circuit 7 having a function of resetting, and this circuit is reset; and its output 0 is inverted and applied to the delay circuit 7 to generate two pulses T<4> at a certain period T2 while the signal A is a 1.
JP56045029A 1981-03-27 1981-03-27 Asynchronous binary signal pnm system Pending JPS57160246A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56045029A JPS57160246A (en) 1981-03-27 1981-03-27 Asynchronous binary signal pnm system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56045029A JPS57160246A (en) 1981-03-27 1981-03-27 Asynchronous binary signal pnm system

Publications (1)

Publication Number Publication Date
JPS57160246A true JPS57160246A (en) 1982-10-02

Family

ID=12707902

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56045029A Pending JPS57160246A (en) 1981-03-27 1981-03-27 Asynchronous binary signal pnm system

Country Status (1)

Country Link
JP (1) JPS57160246A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59112745A (en) * 1982-12-17 1984-06-29 Fujitsu Ltd Asynchronous binary signal transmission system
JPS59119948A (en) * 1982-12-20 1984-07-11 ジ−メンス・アクチエンゲゼルシヤフト Method and device for converting binary signal into pulse code signal

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59112745A (en) * 1982-12-17 1984-06-29 Fujitsu Ltd Asynchronous binary signal transmission system
JPS59119948A (en) * 1982-12-20 1984-07-11 ジ−メンス・アクチエンゲゼルシヤフト Method and device for converting binary signal into pulse code signal

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