JPS553216A - Gate circuit - Google Patents

Gate circuit

Info

Publication number
JPS553216A
JPS553216A JP7537378A JP7537378A JPS553216A JP S553216 A JPS553216 A JP S553216A JP 7537378 A JP7537378 A JP 7537378A JP 7537378 A JP7537378 A JP 7537378A JP S553216 A JPS553216 A JP S553216A
Authority
JP
Japan
Prior art keywords
pulse
output
trigger
clock
duration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7537378A
Other languages
Japanese (ja)
Inventor
Keizo Nishimura
Yasunori Kanazawa
Takashi Hoshino
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP7537378A priority Critical patent/JPS553216A/en
Publication of JPS553216A publication Critical patent/JPS553216A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/78—Generating a single train of pulses having a predetermined pattern, e.g. a predetermined number

Abstract

PURPOSE:To secure a constant pulse duration for the output pulse signals assuredly although no synchronous relation exists between the trigger pulse and the clock pulse in the circuit in which both the trigger and clock pulses are received at the input side and the fixed pulse is delivered after input of the trigger pulse. CONSTITUTION:Trigger pulse (a) is supplied to monostable multivibration circuit 7 from input terminal 1; the Q output (b) which is kept at ''1'' only for one cycle time of clock pulse (c) is generated; waveform (d) formed through AND8 with waveform (c) enters differential circuit 9: and flip-flop 3 is set with the down-faced pulse of output (e) with the output (f) turned to ''1''. And when clock pulse (c) featuring the perfect pulse duration which is supplied after the above procedures is delivered from gate 10 by the amount of the designated number, counter 5 generates output (h) to return flip-flot 3 to the original state. Thus, the output pulse signal of the narrow duration is never mixed up.
JP7537378A 1978-06-23 1978-06-23 Gate circuit Pending JPS553216A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7537378A JPS553216A (en) 1978-06-23 1978-06-23 Gate circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7537378A JPS553216A (en) 1978-06-23 1978-06-23 Gate circuit

Publications (1)

Publication Number Publication Date
JPS553216A true JPS553216A (en) 1980-01-11

Family

ID=13574331

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7537378A Pending JPS553216A (en) 1978-06-23 1978-06-23 Gate circuit

Country Status (1)

Country Link
JP (1) JPS553216A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57153346A (en) * 1981-03-18 1982-09-21 Fujitsu Ltd Noise voltage generation tester
JPS5925414A (en) * 1982-07-31 1984-02-09 Nec Home Electronics Ltd Clock pulse generating circuit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4837060A (en) * 1971-09-13 1973-05-31
JPS4831946B1 (en) * 1970-12-25 1973-10-03

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4831946B1 (en) * 1970-12-25 1973-10-03
JPS4837060A (en) * 1971-09-13 1973-05-31

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57153346A (en) * 1981-03-18 1982-09-21 Fujitsu Ltd Noise voltage generation tester
JPS5925414A (en) * 1982-07-31 1984-02-09 Nec Home Electronics Ltd Clock pulse generating circuit

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