JPS6414946A - Method and apparatus for forming lead of semiconductor device - Google Patents

Method and apparatus for forming lead of semiconductor device

Info

Publication number
JPS6414946A
JPS6414946A JP16989287A JP16989287A JPS6414946A JP S6414946 A JPS6414946 A JP S6414946A JP 16989287 A JP16989287 A JP 16989287A JP 16989287 A JP16989287 A JP 16989287A JP S6414946 A JPS6414946 A JP S6414946A
Authority
JP
Japan
Prior art keywords
punch
holder
bending
die set
gap
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16989287A
Other languages
Japanese (ja)
Inventor
Kenji Taguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP16989287A priority Critical patent/JPS6414946A/en
Publication of JPS6414946A publication Critical patent/JPS6414946A/en
Pending legal-status Critical Current

Links

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To improve the yield rate of formed products, in molding and bending the leads of a semiconductor device, by buffering and restricting compressing force, and positioning a part between the die set of a punch and a holder with the step of a stopper stud. CONSTITUTION:An upper holder 12 is tightened with a stopper stud 13 and a fixing bolt 14 at the lower side of a punch die set 11. A gap, which is formed with a spring 15, is formed between the punch die set 11 and the upper holder 12. A ring 16 is arranged around the gap so that a load is alleviated at the time of press and the gap is equalized. A step 13a, which is made to agree with the upper surface of the punch holder 12, is provided at the stopper stud 13. The tightening of the punch die set 11 and the punch holder 12 is stopped end tightened again at a specified position. 4 bending punch 107 is attached to the lower end of the punch holder 12. The bases of leads are supported on a pad 111 at the lower surface of projection 107a at the lower side. The lead is molded with the side surface of the projection 107a, the lower surface of the bending punch, the side surface of a bending die 112 and the upper surface of the bending die.
JP16989287A 1987-07-09 1987-07-09 Method and apparatus for forming lead of semiconductor device Pending JPS6414946A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16989287A JPS6414946A (en) 1987-07-09 1987-07-09 Method and apparatus for forming lead of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16989287A JPS6414946A (en) 1987-07-09 1987-07-09 Method and apparatus for forming lead of semiconductor device

Publications (1)

Publication Number Publication Date
JPS6414946A true JPS6414946A (en) 1989-01-19

Family

ID=15894895

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16989287A Pending JPS6414946A (en) 1987-07-09 1987-07-09 Method and apparatus for forming lead of semiconductor device

Country Status (1)

Country Link
JP (1) JPS6414946A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100390451B1 (en) * 1999-12-01 2003-07-04 앰코 테크놀로지 코리아 주식회사 prevention structure for crack of substrate for manucture of semiconductor package in moulder

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100390451B1 (en) * 1999-12-01 2003-07-04 앰코 테크놀로지 코리아 주식회사 prevention structure for crack of substrate for manucture of semiconductor package in moulder

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