JPS6414797A - Semiconductor integrated memory - Google Patents

Abstract

PURPOSE:To select a defective chip whose memory cell with an error bit can be replaced by a spare memory cell by providing a semiconductor integrated memory having an on-chip integrating self-test function with a counting circuit for counting up the number of error bits. CONSTITUTION:The semiconductor integrated memory having the on-chip integrating self-test function is provided with the counting circuit 8 for counting up the number of error bits. At the time of reading, a data comparator 7 compares data read out from a memory cell with expected value data outputted from a data pattern generating circuit 6 every bit, and in case of discrepancy, a bit error signal E is generated synchronously with a reference clock signal. The bit error signal E is inputted to the counting circuit 8 e.g. and the number of error bits is counted as binary numbers C1...C1C0. The number (i) of digits of the counting circuit 8 can be optionally set up. Thus, quality chips and defective chips can be simply selected by reading out the number of error bits from the counting circuit 8 after ending self-test operation.