JPS6410862B2 - - Google Patents

Info

Publication number
JPS6410862B2
JPS6410862B2 JP58138643A JP13864383A JPS6410862B2 JP S6410862 B2 JPS6410862 B2 JP S6410862B2 JP 58138643 A JP58138643 A JP 58138643A JP 13864383 A JP13864383 A JP 13864383A JP S6410862 B2 JPS6410862 B2 JP S6410862B2
Authority
JP
Japan
Prior art keywords
bit
data
register
serial
clock
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58138643A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5962938A (ja
Inventor
Edowaado Guroobusu Sutanrei
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of JPS5962938A publication Critical patent/JPS5962938A/ja
Publication of JPS6410862B2 publication Critical patent/JPS6410862B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4904—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using self-synchronising codes, e.g. split-phase codes
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/161—Computing infrastructure, e.g. computer clusters, blade chassis or hardware partitioning

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Signal Processing (AREA)
  • Mathematical Physics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • General Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Computer And Data Communications (AREA)
  • Information Transfer Systems (AREA)
  • Dc Digital Transmission (AREA)
  • Microcomputers (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP58138643A 1978-09-05 1983-07-28 マイクロコンピユ−タ Granted JPS5962938A (ja)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US939744 1978-09-05
US05/939,742 US4361876A (en) 1978-09-05 1978-09-05 Microcomputer with logic for selectively disabling serial communications
US939742 1978-09-05
US939743 1978-09-05

Publications (2)

Publication Number Publication Date
JPS5962938A JPS5962938A (ja) 1984-04-10
JPS6410862B2 true JPS6410862B2 (enExample) 1989-02-22

Family

ID=25473633

Family Applications (3)

Application Number Title Priority Date Filing Date
JP54114049A Expired JPS599926B2 (ja) 1978-09-05 1979-09-04 Ｎｒｚ／２相マイクロコンピユ−タ直列通信論理装置
JP58138644A Pending JPS5962253A (ja) 1978-09-05 1983-07-28 デジタル回路
JP58138643A Granted JPS5962938A (ja) 1978-09-05 1983-07-28 マイクロコンピユ−タ

Family Applications Before (2)

Application Number Title Priority Date Filing Date
JP54114049A Expired JPS599926B2 (ja) 1978-09-05 1979-09-04 Ｎｒｚ／２相マイクロコンピユ−タ直列通信論理装置
JP58138644A Pending JPS5962253A (ja) 1978-09-05 1983-07-28 デジタル回路

Country Status (2)

Country Link
US (1) US4361876A (enExample)
JP (3) JPS599926B2 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0275091A (ja) * 1988-09-09 1990-03-14 Takayuki Murata 情報表示体

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4369516A (en) * 1980-09-15 1983-01-18 Motorola, Inc. Self-clocking data transmission system
DE3119117C2 (de) * 1981-05-14 1993-10-21 Bosch Gmbh Robert Vorrichtung zum Rücksetzen von Recheneinrichtungen
JPS58115547A (ja) * 1981-12-29 1983-07-09 Fujitsu Ltd マイクロプロセツサの動作モ−ド設定方式
US4626985A (en) * 1982-12-30 1986-12-02 Thomson Components - Mostek Corporation Single-chip microcomputer with internal time-multiplexed address/data/interrupt bus
US4686528A (en) * 1984-01-31 1987-08-11 Motorola, Inc. Method of encoding and decoding data signals
JPS60216653A (ja) * 1984-03-28 1985-10-30 Sumitomo Electric Ind Ltd 半導体集積回路
JP2633852B2 (ja) * 1987-06-10 1997-07-23 株式会社日立製作所 データ処理装置
JPH0225955A (ja) * 1988-07-14 1990-01-29 Nec Corp シングルチップマイクロコンピュータ
US5218683A (en) * 1989-10-30 1993-06-08 Hayes Microcomputer Products, Inc. Method and apparatus for concealing the enablement of a device by modifying a status word
US5898890A (en) * 1992-03-27 1999-04-27 Ast Research, Inc. Method for transferring data between devices by generating a strobe pulse and clamping a clock line
CA2192426C (en) * 1996-01-03 2000-08-01 Richard Ng Bidirectional voltage translator
US6324592B1 (en) 1997-02-25 2001-11-27 Keystone Aerospace Apparatus and method for a mobile computer architecture and input/output management system
DE19848211B4 (de) * 1998-10-20 2004-02-05 Honeywell Ag Datenübertragungsverfahren
US6522944B2 (en) 2000-04-27 2003-02-18 Rockwell Automation Technologies, Inc. Driver board control system for modular conveyor with address-based network for inter-conveyor communication
US6701214B1 (en) 2000-04-27 2004-03-02 Rockwell Automation Technologies, Inc. Driver board control system for modular conveyer with address-based network for inter-conveyor communication
US6745232B1 (en) 2000-08-23 2004-06-01 Rockwell Automation Technologies, Inc. Strobed synchronization providing diagnostics in a distributed system
US6701462B1 (en) 2000-05-19 2004-03-02 Rockwell Automation Technologies, Inc. Situational aware output configuration and execution
US6591311B1 (en) 2000-04-27 2003-07-08 Rockwell Automation Technologies, Inc. Method and system for selecting controller output value source

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3242467A (en) * 1960-06-07 1966-03-22 Ibm Temporary storage register
US3286240A (en) * 1962-12-31 1966-11-15 Ibm Channel status checking and switching system
US3480914A (en) * 1967-01-03 1969-11-25 Ibm Control mechanism for a multi-processor computing system
US3470542A (en) * 1967-03-17 1969-09-30 Wang Laboratories Modular system design
US3706974A (en) * 1971-10-27 1972-12-19 Ibm Interface multiplexer
US3813651A (en) * 1971-12-29 1974-05-28 Tokyo Shibaura Electric Co Data processing system
US3742148A (en) * 1972-03-01 1973-06-26 K Ledeen Multiplexing system
JPS5330446B2 (enExample) * 1973-05-12 1978-08-26
JPS5444161B2 (enExample) * 1973-09-08 1979-12-24
US3978455A (en) * 1974-09-09 1976-08-31 Gte Automatic Electric Laboratories Incorporated I/o structure for microprocessor implemented systems
JPS5193139A (enExample) * 1975-02-12 1976-08-16
US3982195A (en) * 1975-05-29 1976-09-21 Teletype Corporation Method and apparatus for decoding diphase signals
JPS5837585B2 (ja) * 1975-09-30 1983-08-17 株式会社東芝 ケイサンキソウチ
US4038644A (en) * 1975-11-19 1977-07-26 Ncr Corporation Destination selection apparatus for a bus oriented computer system
JPS5296836A (en) * 1976-02-10 1977-08-15 Toshiba Corp Multiplex data processing system
US4065809A (en) * 1976-05-27 1977-12-27 Tokyo Shibaura Electric Co., Ltd. Multi-processing system for controlling microcomputers and memories
US4096569A (en) * 1976-12-27 1978-06-20 Honeywell Information Systems Inc. Data processing system having distributed priority network with logic for deactivating information transfer requests
US4168532A (en) * 1977-02-24 1979-09-18 The United States Of America As Represented By The Secretary Of The Air Force Multimode data distribution and control apparatus
US4149242A (en) * 1977-05-06 1979-04-10 Bell Telephone Laboratories, Incorporated Data interface apparatus for multiple sequential processors

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0275091A (ja) * 1988-09-09 1990-03-14 Takayuki Murata 情報表示体

Also Published As

Publication number Publication date
JPS5962938A (ja) 1984-04-10
JPS599926B2 (ja) 1984-03-06
JPS5569833A (en) 1980-05-26
US4361876A (en) 1982-11-30
JPS5962253A (ja) 1984-04-09

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