JPS6399472U - - Google Patents
Info
- Publication number
- JPS6399472U JPS6399472U JP19556686U JP19556686U JPS6399472U JP S6399472 U JPS6399472 U JP S6399472U JP 19556686 U JP19556686 U JP 19556686U JP 19556686 U JP19556686 U JP 19556686U JP S6399472 U JPS6399472 U JP S6399472U
- Authority
- JP
- Japan
- Prior art keywords
- channel
- circuit
- display
- liquid crystal
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004973 liquid crystal related substance Substances 0.000 claims description 6
- 238000006243 chemical reaction Methods 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
Description
第１図は本考案の一実施例によるチヤンネル表
示回路の構成を示すブロツク図、第２図は同実施
例における混合回路の詳細な構成を示す図、第３
図は同実施例の動作を説明するためのタイミング
チヤート、第４図は従来における液晶テレビの表
示駆動回路部分を示すブロツク図である。
１…液晶表示パネル、２ａ…画面表示エリア、
２ｂ…チヤンネル表示エリア、２１…Ａ／Ｄ変換
回路、２２…同期分離回路、２３…同期制御回路
、２４…混合回路、２５…選局機構、２６…チヤ
ンネル用表示回路、２７…セグメント側シフトレ
ジスタ、２８…ラツチ回路、２９…階調信号作成
回路、３０…セグメント側アナログ・マルチプレ
クサ、３１…コモン側シフトレジスタ、３２…コ
モン側アナログ・マルチプレクサ。
FIG. 1 is a block diagram showing the configuration of a channel display circuit according to an embodiment of the present invention, FIG. 2 is a diagram showing the detailed configuration of a mixing circuit in the same embodiment, and FIG.
The figure is a timing chart for explaining the operation of the same embodiment, and FIG. 4 is a block diagram showing the display drive circuit portion of a conventional liquid crystal television. 1...Liquid crystal display panel, 2a...screen display area,
2b...Channel display area, 21...A/D conversion circuit, 22...Synchronization separation circuit, 23...Synchronization control circuit, 24...Mixing circuit, 25...Tuning selection mechanism, 26...Channel display circuit, 27...Segment side shift register , 28... Latch circuit, 29... Gradation signal generation circuit, 30... Segment side analog multiplexer, 31... Common side shift register, 32... Common side analog multiplexer.
Claims (1)
なる液晶表示パネルを用いた液晶テレビにおいて
、ビデオ信号をサンプリングして所定ビツト数の
画面表示用データに変換するＡ／Ｄ変換回路と、
任意チヤンネルを指定する選局機構と、この選局
機構からの選局データに応じてチヤンネル表示用
データを出力するチヤンネル用表示回路と、上記
Ａ／Ｄ変換回路から出力される画面表示用データ
とチヤンネル用表示回路から出力されるチヤンネ
ル表示用データとを指定のタイミングで切換えて
出力する混合回路と、この混合回路から出力され
るデータを取込み、その取込みデータに応じて上
記液晶表示パネルにおける画面表示エリア及びチ
ヤンネル表示エリアを表示駆動する手段とを具備
したことを特徴とする液晶テレビのチヤンネル表
示回路。 In a liquid crystal television using a liquid crystal display panel consisting of a screen display area and a channel display area, an A/D conversion circuit that samples a video signal and converts it into screen display data of a predetermined number of bits;
A channel selection mechanism that specifies an arbitrary channel, a channel display circuit that outputs channel display data according to the channel selection data from the channel selection mechanism, and screen display data that is output from the A/D conversion circuit. A mixing circuit that switches and outputs the channel display data output from the channel display circuit at a specified timing, and a mixing circuit that captures the data output from this mixing circuit and displays the screen on the liquid crystal display panel according to the captured data. What is claimed is: 1. A channel display circuit for a liquid crystal television, comprising means for displaying and driving an area and a channel display area.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986195566U JP2521651Y2 (en) | 1986-12-19 | 1986-12-19 | Display circuit of image display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986195566U JP2521651Y2 (en) | 1986-12-19 | 1986-12-19 | Display circuit of image display device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6399472U true JPS6399472U (en) | 1988-06-28 |
| JP2521651Y2 JP2521651Y2 (en) | 1996-12-25 |
Family
ID=31153569
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1986195566U Expired - Lifetime JP2521651Y2 (en) | 1986-12-19 | 1986-12-19 | Display circuit of image display device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2521651Y2 (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5831687A (en) * | 1981-08-20 | 1983-02-24 | Toshiba Corp | Display data control circuit |
| JPS61373U (en) * | 1984-06-06 | 1986-01-06 | カシオ計算機株式会社 | television receiver |
| JPS6195683A (en) * | 1984-10-17 | 1986-05-14 | Matsushita Electric Ind Co Ltd | Image display device |
-
1986
- 1986-12-19 JP JP1986195566U patent/JP2521651Y2/en not_active Expired - Lifetime
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5831687A (en) * | 1981-08-20 | 1983-02-24 | Toshiba Corp | Display data control circuit |
| JPS61373U (en) * | 1984-06-06 | 1986-01-06 | カシオ計算機株式会社 | television receiver |
| JPS6195683A (en) * | 1984-10-17 | 1986-05-14 | Matsushita Electric Ind Co Ltd | Image display device |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2521651Y2 (en) | 1996-12-25 |
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