JPS61373U - television receiver - Google Patents

television receiver

Info

Publication number
JPS61373U
JPS61373U JP1984083685U JP8368584U JPS61373U JP S61373 U JPS61373 U JP S61373U JP 1984083685 U JP1984083685 U JP 1984083685U JP 8368584 U JP8368584 U JP 8368584U JP S61373 U JPS61373 U JP S61373U
Authority
JP
Japan
Prior art keywords
display
circuit
vertical synchronization
synchronization signal
television receiver
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1984083685U
Other languages
Japanese (ja)
Other versions
JPH0756543Y2 (en
Inventor
浩二 山岸
実 臼井
Original Assignee
カシオ計算機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by カシオ計算機株式会社 filed Critical カシオ計算機株式会社
Priority to JP1984083685U priority Critical patent/JPH0756543Y2/en
Publication of JPS61373U publication Critical patent/JPS61373U/en
Application granted granted Critical
Publication of JPH0756543Y2 publication Critical patent/JPH0756543Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Landscapes

  • Transforming Electric Information Into Light Information (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

図面は本考案の一実施例を示すもので、第１図は外観構
成図、第２図は第１図における液晶表示パネルの電極構
成を示す図、第３図は電子回路の全体の構成を示すブ寵
ツク図、第４図は周波数検出回路の詳細を示すブロック
図、第５図は第４図の周波数検出回路の動作を説明する
ためのタイミングチャート、第６図は制御回路の詳細を
示すブロック図、第７図は第６図における同期検出回路
部分の詳細を示すブロック図、第８図は第６図における
デジタルチューニング制御回路部分の詳細を示すブ冶ツ
ク図である。 １１・・・ケース、１２・・・映像表示部、１３・・・
チャンネル表示部、１４・・・音量表示部、１５・・・
表示パネル、１６ａ・・・チューニング用のアップキー
、１６ｂ・・・ダウンキー、１７ａ・・・音量調整用の
アップキー、１７ｂ・・・ダウンキー、１８・・・オー
ト／マニ．ユアル切換スイッチ、１９・・・ＶＨＦ′／
ＵＨＦ切換スインチ、２０・・・Ｗスイッチ、２１・・
・アンテナ、２２・・・電子同期チューナ、２３・・・
テレビリニア回路、２４・・・Ａ／Ｄ変換回路、２５・
・・液晶駆動回′路、２６・・・周波数検出回路、２７
・・・制御回路、２８・・・キー人力部、２９・・・チ
ューナ同調電圧制御回路、２２１・・・アンテナ結合回
路、２２２・・・高周波結合回路、２２３・・・混合回
路、２２４・・・局部発振回路、２３１・・・中間周波
増幅回路、２３２・・・検波回路、２３３・司快像増幅
回路、２３４・・・同期分離回路、２６１・・・周波数
弁別器、２６２，２６３・・・コンパレータ、２６４，
２６５・・・基準電源、２７１・・・基準クロツク発生
回路、２７２・・・キー制御回路、２７３・・・デジタ
ルチューニング制御回路、２７４・・・同期検出回路、
２７５・・・同調電圧カウンタ、２７６・・・メモリ、
２７７・・・変調波作成回路、２７８・・・音量表示回
路／チャンネル表示回路、２７９・・・表示制御用回路
、２７１０・・・４ビットヵウンタ、２７１１・・・Ｄ
／Ａ変換回路、３１・・・不一致カウンタ、３２・・・
一致カウンタ、３３・・・５δ進カウンタ、３４・・・
同期検出力ウンタ、３６，４１・・・ラッチ向路、６７
・・・４進カウンタ、７９・・・デコーダ、８４・・・
６碓カウンタ。The drawings show one embodiment of the present invention; FIG. 1 is an external configuration diagram, FIG. 2 is a diagram showing the electrode configuration of the liquid crystal display panel in FIG. 1, and FIG. 3 is a diagram showing the overall configuration of the electronic circuit. 4 is a block diagram showing details of the frequency detection circuit, FIG. 5 is a timing chart for explaining the operation of the frequency detection circuit shown in FIG. 4, and FIG. 6 is a block diagram showing details of the control circuit. 7 is a block diagram showing details of the synchronization detection circuit portion in FIG. 6, and FIG. 8 is a block diagram showing details of the digital tuning control circuit portion in FIG. 6. 11... Case, 12... Video display section, 13...
Channel display section, 14...Volume display section, 15...
Display panel, 16a... Up key for tuning, 16b... Down key, 17a... Up key for volume adjustment, 17b... Down key, 18... Auto/Manual. User changeover switch, 19...VHF'/
UHF switching switch, 20...W switch, 21...
・Antenna, 22...Electronic synchronous tuner, 23...
TV linear circuit, 24...A/D conversion circuit, 25.
...Liquid crystal drive circuit, 26...Frequency detection circuit, 27
. . . Control circuit, 28 . . . Key human power section, 29 . . . Tuner tuning voltage control circuit, 221 . -Local oscillation circuit, 231...Intermediate frequency amplification circuit, 232...Detection circuit, 233-Shikai image amplification circuit, 234...Synchronization separation circuit, 261...Frequency discriminator, 262, 263...・Comparator, 264,
265... Reference power supply, 271... Reference clock generation circuit, 272... Key control circuit, 273... Digital tuning control circuit, 274... Synchronization detection circuit,
275... Tuning voltage counter, 276... Memory,
277...Modulated wave creation circuit, 278...Volume display circuit/channel display circuit, 279...Display control circuit, 2710...4-bit counter, 2711...D
/A conversion circuit, 31... Mismatch counter, 32...
Match counter, 33...5δ base counter, 34...
Synchronous detection force counter, 36, 41... Latch direction path, 67
... Quaternary counter, 79... Decoder, 84...
6 usu counter.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] テレビ電波を受信するテレビ受信部と、少なくとも映像
表示部とチャンネル表示部を一体化して形成してなる一
体型表示パネルと、常時は上記テレビ受信部で受信した
映像信号中に含まれる垂直同期信号を基準として上記表
示パネルに対する表示タイミング信号を発生する表示制
御手段と、上記テレビ受信部のチューニング動作中は上
記表示制御手段への垂直同期信号の入力を禁止し、垂直
同期信号とは無関係に上記表示タイミングを発生する手
段とを具備したことを特徴とするパネル型テレビジョン
受像機。A television reception section that receives television radio waves, an integrated display panel formed by integrating at least a video display section and a channel display section, and a vertical synchronization signal that is normally included in the video signal received by the television reception section. During the tuning operation of the display control means that generates a display timing signal for the display panel with reference to the display timing signal, and the television receiver, the input of the vertical synchronization signal to the display control means is prohibited, and the input of the vertical synchronization signal to the display control means is prohibited, regardless of the vertical synchronization signal. 1. A panel television receiver comprising: means for generating display timing.
JP1984083685U 1984-06-06 1984-06-06 Television receiver Expired - Lifetime JPH0756543Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984083685U JPH0756543Y2 (en) 1984-06-06 1984-06-06 Television receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984083685U JPH0756543Y2 (en) 1984-06-06 1984-06-06 Television receiver

Publications (2)

Publication Number Publication Date
JPS61373U true JPS61373U (en) 1986-01-06
JPH0756543Y2 JPH0756543Y2 (en) 1995-12-25

Family

ID=30632534

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984083685U Expired - Lifetime JPH0756543Y2 (en) 1984-06-06 1984-06-06 Television receiver

Country Status (1)

Country Link
JP (1) JPH0756543Y2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6399472U (en) * 1986-12-19 1988-06-28
JPH01118635A (en) * 1987-08-05 1989-05-11 Schubert & Salzer Mas Fab Ag Fiber bundle feed apparatus and production of bundle guide

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5883478A (en) * 1981-11-13 1983-05-19 Hitachi Ltd Reception channel display circuit
JPS58111582A (en) * 1981-12-25 1983-07-02 Toshiba Corp Channel display
JPS58170283A (en) * 1982-03-31 1983-10-06 Sony Corp Tuner
JPS58190180A (en) * 1982-04-30 1983-11-07 Nec Home Electronics Ltd Character broadcast receiver

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5883478A (en) * 1981-11-13 1983-05-19 Hitachi Ltd Reception channel display circuit
JPS58111582A (en) * 1981-12-25 1983-07-02 Toshiba Corp Channel display
JPS58170283A (en) * 1982-03-31 1983-10-06 Sony Corp Tuner
JPS58190180A (en) * 1982-04-30 1983-11-07 Nec Home Electronics Ltd Character broadcast receiver

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6399472U (en) * 1986-12-19 1988-06-28
JPH01118635A (en) * 1987-08-05 1989-05-11 Schubert & Salzer Mas Fab Ag Fiber bundle feed apparatus and production of bundle guide

Also Published As

Publication number Publication date
JPH0756543Y2 (en) 1995-12-25

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