JPH0733268Y2 - LCD display device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial application] The present invention relates to a liquid crystal display device, and more particularly to a liquid crystal display device capable of displaying both TV images and computer images using thin film transistors.

[Prior Art] In a conventional liquid crystal display device, as shown in FIG. 2, a clock signal 13 input to a sample hold array 12 for driving an active matrix liquid crystal 10 is
The same PLL (Phase Locked Loop) is input via the changeover switch 17 when inputting the TV video signal 14 and when inputting the computer video signal 16 from the video RAM 20.
The clock timing of the video data sent from the video RAM 20 or the shift register 22 for generating the computer video supplied from the circuit 18 and the clock output timing from the PLL circuit 18 did not completely match.

By doing so, conventionally, the circuit has been simplified.

[Problems to be Solved by the Invention] Conventional Problems However, in the above-mentioned matrix type liquid crystal display device, particularly in an active matrix type display device using a TFT (thin film transistor), the active matrix liquid crystal 10 in the X-axis direction, When the horizontal video data was sampled by the fixed frequency clock by the trigger start from the sync signal of the computer video or the clock from the PLL circuit 18, when the precise and precise display of the computer video etc. was attempted, the liquid crystal There is a problem that the dots of the display and the dots of the computer video signal do not completely match each other, and it is not possible to generate the intended accurate video.

The purpose of the present invention is to solve the above-mentioned problems, and synchronizes a sampling clock of a video signal with a dot read clock for generating a computer video, and a PLL for a normal TV video signal. An object of the present invention is to provide a liquid crystal display device capable of displaying a precise computer image by using a synchronizing signal generated by a circuit as a clock for sampling an image signal.

[Means and Actions for Solving Problems] In order to achieve the above object, the present invention is a liquid crystal display device having a display function of a television video signal and a display function of a computer video signal. An input terminal to which a television video signal is input, a television video clock generation circuit that separates the television video clock signal from the television video signal, and parallel data output from a video RAM is converted into serial data to convert the computer video signal. A shift register for outputting, a computer video clock signal generation circuit for generating a computer video clock signal for controlling a signal read timing from the video RAM to the shift register, and the television video signal and the computer video signal selectively. The video signal switching circuit to switch and the TV video signal When selected,
When the TV video clock signal is selected and the computer video signal is selected, a clock signal switching circuit that selects the computer video clock signal, and outputting the selected video signal to the selected clock signal The liquid crystal display device is characterized by having a sample and hold circuit for sample and hold according to timing, and a liquid crystal display driven by the sample hole circuit.

In the above, sample unit circuits are incorporated in the sampling circuit group by the number of dots in the horizontal direction of the active matrix liquid crystal, and the timing operation selected by the switching circuit for each unit circuit and the count of the sample hold circuit group are counted. The operation is performed by utilizing the falling edge and the rising edge of the clock signal, whereby the computer image is surely sampled in dot units.

That is, the computer image dots and the sampling dot timings of the matrix liquid crystal are completely coincident with each other, and for example, both the computer image display having high visibility required for an in-vehicle display and the video image display such as TV, TVR are displayed. Is possible.

[Embodiment] A preferred embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 shows a schematic configuration of the present invention. In this embodiment, a computer video signal 26 is generated by a video RAM 28 and a shift register 30, and the video RAM 28 is the same as a conventional computer video generator. It can be connected to a central processing unit (CPU) or a display controller having a similar function to generate a graphical or characteristic image.

Since the readable speed (access time) of the video RAM 28 cannot follow the video read speed, the shift register 30 serves to receive parallel 8-bit data from the video RAM 28, convert it into serial data, and send it out at high speed. The clock signal (computer video clock signal) 31 for sending at this time is supplied by the clock generation circuit 32 by a stable oscillation element such as a crystal.

Separately from this, a video signal such as a TV broadcast video signal or a VTR is input to the sync separation circuit 34, whereby a horizontal sync pulse 35 is obtained. The horizontal synchronizing pulse 35 is input to a PLL (phase locked loop) circuit 36, and a stable clock signal 37 without noise is generated from the circuit 36, and the clock signal 37 is oscillated by the clock generating circuit 32. It is maintained at a cycle almost equal to the cycle.

Here, the most distinctive feature of the present invention is a computer video clock signal generation circuit that generates a computer video clock signal that controls the signal read timing from the video RAM to the shift register, and when the television video signal is selected. A clock signal switching circuit that selects the computer video clock signal when the television video clock signal is selected and the computer video signal is selected, and outputs the selected video signal to the selected clock signal. It has a sample and hold circuit for sample and hold according to timing.

In other words, the changeover switch 3
By connecting the contact 42 of 8 to the A side, the clock signal 37 from the PLL circuit 36 is input to the sample hold array 46, and the contact 42 of the changeover switch 38 is connected to the B side when displaying a computer image. The clock signal 31 from the clock generation circuit 32 is input to the sample hold array 46.

At the same time, the changeover of the video signal is performed by the changeover switch 38.
It is performed by the other changeover switch 40 which works in conjunction with, and in the same way as above, the changeover switch 4
The contact point 44 of 0 is connected to the A side and the TV image signal or the like is input to the sample hold array 46. Further, the contact point 44 is connected to the B side and is read out from the video RAM 28 to the shift register 30 when the computer image is displayed. Video signal is being input.

The sample-hold array 46 is a driver of the active matrix liquid crystal 48 in the X-axis direction (horizontal direction). In the sample-hold array 46, the number of sample-hold unit circuits is equal to the number of dots of the active matrix liquid crystal 48 in the X-axis direction. Embedded in each unit circuit, and each unit circuit is individually sampled by the count value from the clock input. This sample and hold array
The clock signal 31 or 37 selected by the changeover switch 38 is input to the clock input terminal of 46.

Further, in the present embodiment, a thin film transistor (TFT) is used for the active matrix liquid crystal 48, and the active matrix liquid crystal 48 has, for example, t row electrodes and n column electrodes. Display dots forming pixels are arranged in a matrix at intersections of the electrodes and the respective column electrodes. Then, each display dot is driven and displayed by simultaneously selecting the corresponding row electrode and column electrode.

When a polysilicon or the like is used as the thin film transistor, an analog switch array may be used instead of the sample hold array 46.

Next, the shift operation of the shift register 30 during the display of a computer image is performed by the output signal 31 of the clock generation circuit 32.
, And counting of the sample and hold array 46 is performed by the rising of the signal 31. As a result, the video signal from the computer can be sampled and held at a stable timing.

Then, the computer image is surely sampled in dot units and displayed on the active matrix liquid crystal 48. The video signal sampled at this time is the video signal selected by the changeover switch 40. Further, the shift register 50 for driving the matrix liquid crystal 48 is the same as the conventional technology for driving the game for selecting the Y-axis direction. It is a signal shift register.

As described above, according to the present embodiment, since the dot timing of the computer image and the sampling dot timing of the active matrix liquid crystal are completely coincident with each other, a precise image without display inaccuracy or blurring due to dot roughness is provided. Can be displayed. Therefore, it is possible to achieve both a computer image display with high visibility required for an in-vehicle display and a television image display function such as a TV or VTR, and a thin display with high display performance as an in-vehicle display. By being used, it can be incorporated into a small-sized vehicle that could not be mounted because of space limitations, and various information can be displayed and transmitted to the driver.

That is, the present invention is particularly effective when applied to a vehicle-mounted display device in which a high-speed clock signal needs to be transferred to and from a computer and a TV display is also required.

[Advantage of the Invention] As described above, the present invention is provided with the clock signal switching circuit to selectively switch the computer video signal reading clock and the clock signal generated from the TV video signal as the sampling clock of the video signal. By making it possible, it is possible to display not only TV images but also clear and precise computer images.

[Brief description of drawings]

FIG. 1 is a schematic diagram for explaining a liquid crystal display device according to the present invention, and FIG. 2 is a diagram for explaining a conventional liquid crystal display device. 26 ... Computer video signal 28 ... Video RAM 30, 50 ... Shift register 32 ... Clock generation circuit 36 ... PLL circuit 38, 40 ... Changeover switch 46 ... Sample hold array 48 ... Active matrix liquid crystal.

Claims (1)

[Scope of utility model registration request] 1. A liquid crystal display device having a display function of a TV video signal and a display function of a computer video signal, the input terminal receiving the TV video signal, and the TV video clock from the TV video signal. A television video clock generation circuit for separating signals, a shift register for converting parallel data output from the video RAM into serial data and outputting the computer video signal, and a signal read timing from the video RAM to the shift register. A computer video clock signal generation circuit that generates a computer video clock signal to control, a video signal switching circuit that selectively switches the television video signal and the computer video signal, and when the television video signal is selected, Select the TV video clock signal, When a computer video signal is selected, a clock signal switching circuit that selects the computer video clock signal, a sample hold circuit that samples and holds the selected video signal at the output timing of the selected clock signal, A liquid crystal display driven by the sample and hold circuit;