JPH08331486A - Image display device - Google Patents

Abstract

PURPOSE: To provide an image display device with which an image can be normally displayed even when the number of vertical scanning lines of a video signal is less than the number of picture elements in the vertical direction of a liquid crystal panel. CONSTITUTION: The non-video signal period of a video signal is detected by a drive control circuit 17, and a control signal is sent to a drive signal generating circuit 14. Corresponding to this control signal, the drive signal generating circuit 14 drives a liquid crystal panel 1 while increasing the scanning frequencies of vertical and horizontal scanning clock signals 5 and 7 rather than the scanning frequencies during a normal video signal period. Then, the scan of the liquid crystal panel 1 is completed within one vertical scanning period of the video signal. At the same time, the video signal is fixed at a black level by a video signal switching circuit 15 during the non-video signal period and an influence upon a display screen caused by the change of the scanning frequency is eliminated.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image display device for displaying video signals on a liquid crystal panel such as a television and a computer.

[0002]

2. Description of the Related Art In recent years, as computer equipment has become more sophisticated, image display equipment for displaying the video signal has also become more sophisticated. Among them, there is an increasing demand for image display devices capable of displaying video signals of various frequencies, so-called multi-scan image display devices. As a conventional image display device, a cathode ray tube (Cathode Ray T
The image display device using a Cube (hereinafter referred to as “CRT”) is mainly used, but CR is used because the CRT is used for the image display unit.
There was a limit to the miniaturization of the device due to the physical limitation of T and the like.
An image display device using a liquid crystal panel as an image display unit has been proposed in order to remove this limitation and reduce the size of the device.

FIG. 4 is a block diagram showing the configuration of an example of an image display device using a liquid crystal panel.

In FIG. 4, reference numeral 1 denotes a liquid crystal panel, and here, an example of an active matrix type liquid crystal panel in which switching elements are arranged in a matrix at intersections of scanning signal lines and video signal lines is shown (the switching elements are shown in FIG. (Not shown). Reference numeral 2 is a vertical scanning drive circuit for supplying a control signal to the scanning signal line of the liquid crystal panel 1 for vertical scanning of the video signal, and operating the switching elements sequentially in the vertical direction. Is a horizontal scanning drive circuit for supplying a video signal to the video signal line of the liquid crystal panel 1 for horizontal scanning. In the example shown in FIG. 4, the horizontal scanning drive circuit has two systems for the liquid crystal panel 1, and the horizontal scanning drive circuit 3 is provided above and below the display screen of the liquid crystal panel 1, respectively. The signal lines are arranged in a comb shape.

The video signal input to the image display device is input to the video signal processing circuit 11 and converted into a video signal in a form necessary for displaying an image on the liquid crystal panel 1. At the same time, the video signal is input to the sync separation circuit 12, and the vertical sync signal and the horizontal sync signal are separated from the video signal. The horizontal sync signal separated by the sync separation circuit 12 is supplied to the PLL circuit 13
And a reference clock signal synchronized with the horizontal synchronizing signal is generated. The vertical synchronizing signal, the horizontal synchronizing signal, and the reference clock signal are input to the drive signal generating circuit 14, and a control signal for displaying a video signal on the liquid crystal panel 1 is generated.

The control signal is a signal which is synchronized with the vertical synchronizing signal of the video signal and which is synchronized with the vertical scanning start signal 4 for controlling the start of the vertical scanning of the liquid crystal panel 1 and the horizontal synchronizing signal of the video signal. A vertical scanning clock signal 5 for scanning the liquid crystal panel 1 in the vertical direction, and a signal for synchronizing with the horizontal synchronizing signal of the video signal, which is a signal for controlling the start of the horizontal scanning of the liquid crystal panel 1. It is a signal that is synchronized with the scan start signal 6 and a reference clock signal that is synchronized with the horizontal synchronization signal of the video signal generated by the PLL circuit 13, and that is a signal that takes the timing of sampling of the video signal displayed in each pixel of the liquid crystal panel 1. There is some horizontal scan clock signal 7.

The vertical scanning clock signal 5 and the horizontal scanning start signal 6 are signals synchronized with the horizontal synchronizing signal of the video signal, but in order to eliminate the phase difference with the horizontal scanning clock signal 7, the horizontal synchronizing of the video signal is performed. In many cases, the horizontal scanning clock signal 7 is counted and generated instead of being generated directly from the signal. The vertical scan start signal 4 and the vertical scan clock signal 5 are supplied to the vertical scan drive circuit 2, and the horizontal scan start signal 6 and the horizontal scan clock signal 7 are supplied to the horizontal scan drive circuit 3.
Respectively.

The vertical scanning of the liquid crystal panel 1 is performed by the vertical scanning start signal 4 and the vertical scanning clock signal 5, the vertical scanning start signal 4 is input, and then the vertical scanning clock signal 5 is inputted.
The rows of pixels of the liquid crystal panel 1 on which the video signal is displayed are moved by. For horizontal scanning, the horizontal scanning start signal 6
The horizontal scanning start signal 6 is input to the video signal input to the liquid crystal panel 1, and the horizontal scanning clock signal 7 is input.
After that, the pixels are sampled at a timing synchronized with the horizontal scanning clock signal 7 and displayed on each pixel of the liquid crystal panel 1.

FIG. 5 is a timing chart showing a part of the control signal for one horizontal scanning period of the video signal in order to explain the timing of the control signal for displaying the video signal on each pixel of the liquid crystal panel 1. is there.

The vertical scanning clock signal 5 defines a row of pixels of the liquid crystal panel 1 to which a video signal is written, and controls a switching element in that row. The horizontal scanning clock signal 7 is a signal for controlling the timing of sampling the video signal, and for example, the video signal is sampled at the rising timing of the horizontal scanning clock signal 7 and displayed on each pixel. Therefore, the horizontal scanning clock signal 7
Need more pulses than the number of pixels in the horizontal direction of the liquid crystal panel 1 in one horizontal scanning period in order to sample the video signal. As the number of pixels in the horizontal direction of the liquid crystal panel 1 increases, the scanning frequency of the horizontal scanning clock signal 7 increases. Therefore, in order to reduce the scanning frequency of the horizontal scanning clock signal 7, a horizontal scanning driving circuit for the liquid crystal panel. A plurality of 3 are provided. The example of the image display device shown in FIG. 4 shows the case where the horizontal scanning drive circuit 3 has two systems, but the horizontal scanning clock signals 7 in this case generally have mutually opposite phases as shown in FIG. Signal is applied to the horizontal scanning drive circuit 3 installed on the upper and lower parts of the screen of the liquid crystal panel 1, respectively.

By applying the various control signals generated by the drive signal generating circuit 14 to the vertical scanning drive circuit 2 and the horizontal scanning drive circuit 3 as described above, an image can be displayed on the liquid crystal panel 1.

[0012]

However, in the above conventional configuration, the vertical scanning of the screen is performed line by line in the vertical direction in synchronization with the horizontal synchronizing signal by the vertical scanning clock signal generated from the horizontal synchronizing signal of the video signal. Since scanning is performed, the number of horizontal synchronizing signals of the video signal, that is, the number of vertical scanning lines needs to be equal to or more than the number of pixels in the vertical direction of the liquid crystal panel, and the number of vertical scanning lines is vertical to the liquid crystal panel. There is a problem that a video signal having less than the number of pixels in the direction cannot be normally displayed.

For example, video signals of personal computers that are widely used at present include those having 400 dots in the vertical direction and those having 480 dots. The number of scanning lines in the vertical direction is 440 and 525, respectively. Therefore, when an image signal of a personal computer having 400 dots in the vertical direction is displayed on a liquid crystal panel having 480 dots in the vertical direction, the number of scanning lines is only 440, so that the lower side of the screen is displayed. There is a problem that a part of the next screen is displayed on the 40 dots.

The present invention has been made in view of the above points, and in an image display device for displaying a video signal such as a television or a computer on a liquid crystal panel, the number of vertical scanning lines of the video signal is in the vertical direction of the liquid crystal panel. An object of the present invention is to provide an image display device capable of displaying a normal image even when the number of pixels is smaller than the number of pixels.

[0015]

In order to achieve the above object, the present invention drives a liquid crystal panel and a PLL circuit which generates a reference clock signal in synchronization with a horizontal synchronizing signal of a video signal in an image display device. A drive signal generation circuit for generating each timing signal necessary for displaying an image,
A video signal switching circuit for switching a video signal, and a drive control circuit for controlling the drive signal generating circuit and the video signal switching circuit according to a vertical synchronizing signal and a horizontal synchronizing signal of the video signal are provided. In the period and the non-video signal period, the scanning frequency of the vertical scanning clock signal for performing vertical scanning of the liquid crystal panel generated by the drive signal generation circuit by the control signal generated by the drive control circuit, or the vertical scanning clock signal. Both the scanning frequency of the scanning clock signal and the scanning frequency of the horizontal scanning clock signal for performing horizontal scanning of the liquid crystal panel generated by the drive signal generating circuit are changed, and the video signal during the vertical blanking period. The switching circuit switches the video signal to a signal of a level for displaying a black screen.

[0016]

According to the present invention, with the above-described structure, in an image display device for displaying a video signal such as a television or a computer on a liquid crystal panel, the number of vertical scanning lines of the video signal is smaller than the number of pixels in the vertical direction of the liquid crystal panel. However, a normal image can be displayed.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An image display apparatus according to an embodiment of the present invention will be described below with reference to the drawings.

(Embodiment 1) FIG. 1 is a block diagram showing the arrangement of an image display apparatus according to Embodiment 1 of the present invention. In the first embodiment, the scanning frequency of the vertical scanning clock signal for performing the vertical scanning of the liquid crystal panel generated by the drive signal generating circuit is changed in the vertical blanking period and the video signal period of the vertical video signal. It is configured in. The same components as those of the conventional example shown in FIG. 4 are designated by the same reference numerals, and detailed description thereof will be omitted.

In FIG. 1, reference numeral 1 is an active matrix type liquid crystal panel having switching elements, and 2 is a control signal supplied to a scanning signal line of the liquid crystal panel 1 for vertical scanning of a video signal to switch the switching elements. Vertical scanning drive circuit for operating sequentially in the vertical direction, 3
Is a horizontal scanning drive circuit for supplying a video signal to the video signal line of the liquid crystal panel 1 for scanning the video signal in the horizontal direction, and 11 is a shape required for displaying the input video signal on the liquid crystal panel 1. Video signal processing circuit for processing
Reference numeral 12 is a sync separation circuit for separating a vertical sync signal and a horizontal sync signal from a video signal, and 13 is a phase locked loop circuit for generating a reference clock signal in synchronization with the horizontal sync signal separated by the sync separation circuit 12. (Hereinafter referred to as PLL circuit), 14 is a drive signal generating circuit for generating a control signal for displaying a video signal on the liquid crystal panel 1 from a vertical synchronizing signal, a horizontal synchronizing signal and a reference clock signal, 15
Is a video switching circuit for switching a video signal to a black level video signal, 16 is a black level signal generation circuit for generating a black level video signal for displaying a black display screen, 1
A drive control circuit 7 controls the drive signal generation circuit 14 and the video signal switching circuit 15 by detecting the video signal period and the non-video signal period of the video signal.

The operation of the image display device having the above configuration will be described below. The control signals generated by the drive signal generation circuit 14 include a vertical scanning start signal 4 for controlling the start of vertical scanning of the liquid crystal panel 1, a vertical scanning clock signal 5 for performing vertical scanning, and a horizontal direction. Horizontal scanning start signal 6 for controlling the start of scanning and horizontal scanning clock signal 7 for horizontal scanning
There is a vertical scanning start signal 4 and a vertical scanning clock signal 5
Is input to the vertical scanning drive circuit 2, and the horizontal scanning start signal 6 and the horizontal scanning clock signal 7 are input to the horizontal scanning drive circuit 3.

Generally, the vertical scanning drive circuit 2 is composed of a shift register circuit and a drive circuit (not shown) for amplifying the input signal level. When the vertical scanning start signal 4 is input, the vertical scanning clock signal is supplied. The position of the drive circuit that outputs the control signal for turning on the switching element of the liquid crystal panel 1 is sequentially moved by 5. The horizontal scanning drive circuit 3 includes a shift register circuit and two sets of sample and hold circuits (neither is shown).
When a horizontal scanning start signal 6 is input, one set of samples
The position of the sample and hold circuit for sampling the video signal with respect to the hold circuit is moved in sequence. At this time, the other sample and hold circuit outputs the sampled / held video signal to the video signal line of the liquid crystal panel 1.

As described above, the liquid crystal panel 1 displays the video signal on the pixels selected in a matrix by the control signal generated by the drive signal generating circuit 14. Therefore, the vertical scanning clock signal 5 needs to include clock pulses of the number of pixels in the vertical direction of the liquid crystal panel 1 or more during one vertical scanning period. It is necessary that the number of clock pulses equal to or greater than the number of pixels in the horizontal direction of the liquid crystal panel 1 be included in the horizontal scanning period.

FIG. 2 is a timing chart for explaining the operation of the image display apparatus according to the first embodiment of the present invention when the number of vertical scanning lines of the video signal is smaller than the number of vertical pixels of the liquid crystal panel. In FIG. 2, in the vertical blanking period and the video signal period of the vertical video signal, only the scanning frequency of the vertical scanning clock signal 5 for performing the vertical scanning of the liquid crystal panel generated by the drive signal generating circuit 14 is changed. It shows the operation in the case of.

Hereinafter, with reference to FIGS. 1 and 2, for example, when the number of pixels in the vertical direction of the liquid crystal panel 1 is 480 dots, the total number of scanning lines in the vertical direction is 440, and the scanning lines in the video signal period. A case where a video signal whose number is 400 is displayed will be described.

The number of pixels in the vertical direction of the liquid crystal panel 1 is 480.
In the case of dots, the vertical scanning clock signal 5 needs to include at least 480 clock pulses in one vertical scanning period. However, since the total number of scanning lines of the video signal to be displayed is 440, the number of clock pulses included in the vertical scanning clock signal 5 is 440, which is 40
I run out of pieces. Therefore, in this embodiment, the scanning frequency of the vertical scanning clock signal 5 is doubled for 40 scanning periods, which are non-video signal periods in one vertical scanning period, so that the vertical scanning clock signal 5 in one vertical scanning period is doubled. The number of clock pulses is set to 480.

The drive control circuit 17 detects the video signal period and the non-video signal period of the video signal from the vertical sync signal and the horizontal sync signal, and sends a control signal to the drive signal generation circuit 14 during the non-video signal period to generate a drive signal. The scanning frequency of the vertical scanning clock signal 5 generated by the circuit 14 is controlled to be doubled. Since the position of the non-video signal period is determined by the number of scanning lines from the vertical synchronizing signal, it can be detected by configuring a counter circuit or the like. In order to change the scanning frequency of the vertical scanning clock signal 5, for example, when the vertical scanning clock signal 5 is generated by counting the horizontal scanning clock signal 7, the non-video signal period is half the video signal period. This can be easily realized by configuring a logic circuit that generates the vertical scanning clock signal 5.

In the non-video signal period, the screen is originally displayed in black, but in order to avoid the influence of doubling the scanning frequency of the vertical scanning clock signal 5, the control signal generated by the drive control circuit 17 causes In the non-video signal period, the video signal is switched to the black level video signal by the video signal switching circuit 15 so that the screen is surely displayed in black.

Here, in the image display device of the first embodiment, the vertical scanning clock signal 5 is supplied during the non-video signal period.
The scanning frequency of the horizontal scanning clock signal 7 is not changed, but the scanning frequency of the horizontal scanning clock signal 7 is not changed. Therefore, by increasing the scanning frequency of the vertical scanning clock signal 5, one horizontal scanning period is shortened, so that the horizontal scanning clock signal 7 during one horizontal scanning period is shortened.
Since the number of clock pulses included in is small, it is not possible to sample the video signal for all pixels in the horizontal direction of the liquid crystal panel 1 during one horizontal scanning period. However, during the non-video signal period, the video signal is converted to the black level video signal by the video signal switching circuit 15, so that the sampling of the horizontal pixels of the liquid crystal panel 1 during the non-video signal period becomes one horizontal scanning period or more. However, the image displayed on the screen is not affected.

As described above, in the first embodiment of the present invention, by changing the scanning frequency of the vertical scanning clock signal during the non-video signal period, the number of vertical scanning lines becomes smaller than the number of pixels in the vertical direction of the liquid crystal panel. A small amount of video signal can be displayed normally.

(Embodiment 2) Next, an image display apparatus according to another embodiment of the present invention will be described with reference to the drawings. The second embodiment has the same configuration as that of the image display device of the first embodiment, but the vertical scanning of the liquid crystal panel generated by the drive signal generating circuit is performed in the vertical blanking period and the video signal period of the vertical video signal. Both the scanning frequency of the vertical scanning clock signal for performing the scanning and the scanning frequency of the horizontal scanning clock signal for scanning the liquid crystal panel in the horizontal direction are changed. The configuration of the image display device according to the second embodiment is the same as that of the image display device according to the first embodiment shown in FIG. 1, and thus the same reference numerals are given and detailed description thereof is omitted.

FIG. 3 is a timing chart for explaining the operation of the image display apparatus according to the second embodiment of the present invention when the number of vertical scanning lines of the video signal is smaller than the number of vertical pixels of the liquid crystal panel. In FIG. 3, in the vertical blanking period and the video signal period of the vertical video signal, the scanning frequency of the vertical scanning clock signal for performing the vertical scanning of the liquid crystal panel generated by the drive signal generation circuit and the horizontal direction of the liquid crystal panel. 2 shows an operation in the case where both the scanning frequencies of the horizontal scanning clock signal for performing the scanning are changed.

Hereinafter, with reference to FIGS. 1 and 3, as an example, when the number of pixels in the vertical direction of the liquid crystal panel 1 is 480 dots, the total number of scanning lines in the vertical direction is 440, and the scanning lines in the video signal period. A case where a video signal whose number is 400 is displayed will be described.

As described in the description of the first embodiment,
When the number of pixels in the vertical direction of the liquid crystal panel 1 is 480 dots, and when a video signal having 400 scanning lines in the video signal period is displayed, the number of clock pulses included in the vertical scanning clock signal 5 is 440. It becomes 40 pieces and becomes short. Therefore, also in the second embodiment, the scanning frequency of the vertical scanning clock signal 5 is doubled for 40 scanning periods which are non-video signal periods in one vertical scanning period to thereby double the vertical scanning clock signal 5 in one vertical scanning period. The number of clock pulses is set to 480.

In the first embodiment, the scanning frequency of the horizontal scanning clock signal 7 is not changed during the non-video signal period. Therefore, by increasing the scanning frequency of the vertical scanning clock signal 5, one horizontal scanning period is shortened. Therefore, the number of clock pulses included in the horizontal scanning clock signal 7 during one horizontal scanning period is reduced, and it is not possible to sample the video signal for all pixels in the horizontal direction of the liquid crystal panel 1 during one horizontal scanning period. Therefore, in the second embodiment, the scanning frequency of the vertical scanning clock signal 5 is controlled to be doubled at the same time as the scanning frequency of the horizontal scanning clock signal 7 is controlled to be doubled during the non-video signal period. 640 during one vertical scanning period changed by
The video signal can be sampled for all pixels in the horizontal direction of the dot.

The drive control circuit 17 detects the video signal period and the non-video signal period of the video signal from the vertical sync signal and the horizontal sync signal, and sends a control signal to the drive signal generation circuit 14 during the non-video signal period to generate a drive signal. The scanning frequency of the horizontal scanning clock signal 7 generated by the circuit 14 is controlled to be doubled. To change the scanning frequency of the horizontal scanning clock signal 7, for example, the scanning frequency of the reference clock signal generated by the PLL circuit 3 is set to twice the normal frequency in advance, and the driving signal generating circuit 14 is provided with a frequency divider of 2. This can be realized by switching the frequency of the reference clock signal of the circuit provided and generating the horizontal scanning clock signal 7 between the video signal period and the non-video signal period.

When the vertical scanning clock signal 5 is generated by counting the horizontal clock signal 7, the scanning frequency of the horizontal clock signal 7 is doubled by doubling the frequency of the reference clock signal. Therefore, the scanning frequency of the vertical scanning clock signal 5 is also doubled, so that a circuit for switching the scanning frequency of the vertical scanning clock signal 5 is unnecessary.

In the non-video signal period, the screen is originally displayed in black, but in order to avoid the effect of doubling the scanning frequency of the vertical scanning clock signal 5, the control signal generated by the drive control circuit 17 causes In the non-video signal period, the video signal is switched to the black level video signal by the video signal switching circuit 15 so that the screen is surely displayed in black.

As described above, in the second embodiment of the present invention, the number of vertical scanning lines is changed by changing both the scanning frequency of the vertical scanning clock signal and the scanning frequency of the horizontal scanning clock signal during the non-video signal period. It is possible to normally display a video signal having less than the number of pixels in the vertical direction of the liquid crystal panel.

In the first and second embodiments of the present invention, as an example for explanation, the number of pixels in the vertical direction of the liquid crystal panel is 480 dots, and the number of vertical scanning lines of the video signal to be displayed is 440. Although described for a certain case, it is clear that the present invention is not limited to this condition.
Furthermore, the present invention is not limited to the liquid crystal panel.

[0040]

As described above, in the image display device of the present invention, the scanning frequency of the vertical scanning clock signal during the non-video signal period, or the scanning frequency of the vertical scanning clock signal and the horizontal scanning clock in the non-video signal period. By changing both the scanning frequencies of the signals, it is possible to display the video signals normally even when the number of vertical scanning lines of the video signals is smaller than the number of pixels in the vertical direction of the liquid crystal panel.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of an image display device according to a first embodiment of the present invention.

FIG. 2 is a timing chart showing the operation of the image display device according to the first embodiment.

FIG. 3 is a timing chart showing the operation of the image display device according to the second embodiment.

FIG. 4 is a block diagram showing a configuration of an example of a conventional image display device.

FIG. 5 is a timing chart showing the operation of the conventional image display device.

[Description of Reference Signs] 1 liquid crystal panel 2 vertical scan drive circuit 3 horizontal scan drive circuit 4 vertical scan start signal 5 vertical scan clock signal 6 horizontal scan start signal 7 horizontal scan clock signal 11 video signal processing circuit 12 sync separation circuit 13 PLL circuit 14 drive signal generation circuit 15 video signal switching circuit 16 black level signal generation circuit 17 drive control circuit

Claims (1)

[Claims] 1. A phase locked loop circuit for generating a reference clock signal in synchronization with a horizontal synchronizing signal of a video signal, a drive signal generating circuit for generating each timing signal, and a video signal switching circuit for switching the video signal. A drive control circuit for controlling the drive signal generation circuit and the video signal switching circuit according to a vertical sync signal and a horizontal sync signal of a video signal, wherein the drive signal generation circuit and the non-video signal period of the vertical video signal are: The scanning frequency of the vertical scanning clock signal for scanning the display screen in the vertical direction generated by the driving signal generating circuit by the control signal generated by the driving control circuit, or the scanning frequency of the vertical scanning clock signal and the driving Both the scanning frequency of the horizontal scanning clock signal for horizontal scanning of the display screen generated by the signal generating circuit is changed. In addition, during the vertical blanking period, the video signal switching circuit switches the video signal to a signal of a level for displaying a black screen.