JPS639752B2 - - Google Patents

Info

Publication number
JPS639752B2
JPS639752B2 JP57057304A JP5730482A JPS639752B2 JP S639752 B2 JPS639752 B2 JP S639752B2 JP 57057304 A JP57057304 A JP 57057304A JP 5730482 A JP5730482 A JP 5730482A JP S639752 B2 JPS639752 B2 JP S639752B2
Authority
JP
Japan
Prior art keywords
film
floating gate
mos transistor
substrate
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57057304A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58175853A (ja
Inventor
Kazumichi Oomura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP57057304A priority Critical patent/JPS58175853A/ja
Publication of JPS58175853A publication Critical patent/JPS58175853A/ja
Publication of JPS639752B2 publication Critical patent/JPS639752B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D88/00Three-dimensional [3D] integrated devices

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Non-Volatile Memory (AREA)
  • Recrystallisation Techniques (AREA)
JP57057304A 1982-04-08 1982-04-08 半導体装置 Granted JPS58175853A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57057304A JPS58175853A (ja) 1982-04-08 1982-04-08 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57057304A JPS58175853A (ja) 1982-04-08 1982-04-08 半導体装置

Publications (2)

Publication Number Publication Date
JPS58175853A JPS58175853A (ja) 1983-10-15
JPS639752B2 true JPS639752B2 (enrdf_load_stackoverflow) 1988-03-01

Family

ID=13051810

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57057304A Granted JPS58175853A (ja) 1982-04-08 1982-04-08 半導体装置

Country Status (1)

Country Link
JP (1) JPS58175853A (enrdf_load_stackoverflow)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4748485A (en) * 1985-03-21 1988-05-31 Hughes Aircraft Company Opposed dual-gate hybrid structure for three-dimensional integrated circuits
US5045501A (en) * 1986-08-25 1991-09-03 Hughes Aircraft Company Method of forming an integrated circuit structure with multiple common planes
JPH02246267A (ja) * 1989-03-20 1990-10-02 Fujitsu Ltd 半導体装置の製造方法
JPH06216392A (ja) * 1993-01-20 1994-08-05 Mitsubishi Electric Corp 半導体装置の製造方法
US5808319A (en) * 1996-10-10 1998-09-15 Advanced Micro Devices, Inc. Localized semiconductor substrate for multilevel transistors
US6191446B1 (en) 1998-03-04 2001-02-20 Advanced Micro Devices, Inc. Formation and control of a vertically oriented transistor channel length

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51108737A (ja) * 1975-03-20 1976-09-27 Fujitsu Ltd Handotaikiokusochi

Also Published As

Publication number Publication date
JPS58175853A (ja) 1983-10-15

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