JPS639156A - Manufacture of thin film transistor - Google Patents

Abstract

PURPOSE:To manufacture a thin film transistor with excellent and stable ohmic property and high reliability by a method wherein, after making an opening in a second insulating layer and performing hydrogen plasma processing, an ohmic contact layer is formed. CONSTITUTION:After forming the first conductive layer on an insulating sub strate 9, a control electrode 1 is formed of the first conductive layer and then the first insulating layer 2, a non-single crystal semiconductor layer 3, the second insulating later 4 are successively formed. Next, after making an opening, the second insulating layer 4 is hydrogen-plasma processed to form an ohmic contact layer 5 and the second conductive layer 6 successively on the second insulating layer 4. Later, the main electrodes 6a, 6b are formed of the second conductive layer 6 to remove the needless part of ohmic contact layer 5 using the main electrodes 6a, 6b as masks. Through these procedures, the impurity such as water content, oxygen and hydrocarbon etc. adhering to the layer 5 in case of making the opening can be removed so that excellent ohmic contact and stable electric property may be assured.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing 911g) radiators, particularly non-single crystal semiconductors! The present invention relates to a method of manufacturing a thin film transistor used in a film semiconductor layer.

[Prior art] Non-single crystal semiconductor 1 For example, non-single crystal silicon has lower mobility than crystalline silicon, but because it can be easily manufactured in a large area at low cost, it has recently been used as a thin film transistor for use in liquid crystal displays, image sensors, etc. The application of is attracting attention.

In order to obtain stable device characteristics, thin film transistors are often provided with an insulating layer having a function of protecting the channel portion so that the surface of the semiconductor layer does not come into contact with the atmosphere.

FIG. 3 is a configuration diagram showing an example of a thin film transistor having an insulating layer. FIG. 3(a) is a plan view, and FIG.
) is a sectional view taken along line A-A' in FIG. 3 (&) (7).

As shown in FIGS. 3(a) and 3(b), a gate electrode l is formed on an insulating substrate 9, and silicon nitride (hereinafter referred to as S i Nx:H) and silicon oxide (hereinafter referred to as 5
A gate insulating layer 2 of hg (referred to as i02) is formed, and a semiconductor layer 3 of non-single crystal gyricon is further formed thereon. On this semiconductor layer 3 are S i NX:H, S i
An insulating layer 4 having a protective function such as 02 is formed and partially opened. Reference numeral 7.8 in FIG. 1 indicates an opening in which a source electrode 6a and a drain electrode 6b are formed via the ohmic contact layer 5 of the upper layer.

[Problems to be Solved by the Invention] In the thin film transistor described above, no treatment is performed after the opening is formed in the insulating layer 4. When the contact layer 5 is deposited, oxygen, moisture, etc. are adsorbed during the opening formation process. Therefore, there was a problem in that good ohmic characteristics could not be obtained, and uniform and stable transistor characteristics could not be obtained.

FIG. 4 is a characteristic diagram of an example of the thin film transistor.

FIG. 4 shows the Id (drain current) - Vd (drain voltage) characteristics of the FM film transistor, in which the thin film transistor is made of amorphous silicon (a -5i) and phosphorus-doped amorphous silicon n middle layer were used as the ohmic contact layer, and were manufactured by plasma CVD. As shown in the figure, the I of a normal field effect transistor is
The characteristics deviate greatly from the d-Vd characteristics (dashed line in the figure).

As a method to solve the above problems, JP-A No. 59-4
There is the following method disclosed in Japanese Patent No. 8960. In this method, in order to form a good ohmic contact layer,
After making an opening in the insulating layer with one function, SiF4
In this method, plasma etching is performed using a source gas such as XeF2, and then an ohmic contact layer is deposited.

(1) Fluorine remains on the surface of the opening, making it impossible to control the impurity concentration of the semiconductor layer, resulting in unstable transistor characteristics.

(2) Since etching gas remains in the chamber of the deposition equipment, the ohmic contact layer cannot be deposited in the same chamber.

etc., which resulted in an increase in the number of steps and increased costs.

The object of the present invention is to provide a method for manufacturing a highly reliable PM film transistor with good and stable ohmic characteristics.

[Means for solving the problem] The above problem is solved by forming the first conductive layer on the insulating substrate, forming the control TL pole from this first conductive layer, and then forming the control TL pole on the first insulating layer. , non-single crystal semiconductor layer.

a step of sequentially forming a second insulating layer, a step of forming an opening in the second insulating layer, a step of performing hydrogen plasma treatment after forming the opening, and forming an ohmic contact layer on the second insulating layer. , after sequentially forming the second conductive layer, a step of forming a main electrode from the second conductive layer, and a step of removing unnecessary portions of the ohmic contact layer using the main electrode as a mask. The problem is solved by a method for manufacturing thin film transistors.

[Function] In the method for manufacturing a thin film transistor of the present invention, an opening is formed in the second insulating layer, and hydrogen plasma treatment is performed after the opening is formed, thereby removing moisture, oxygen, hydrocarbons, etc. adsorbed during the formation of the opening. The purpose is to remove impurities and prevent loss of good ohmic contact.

[Example] Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is an explanatory diagram showing the manufacturing process of one embodiment of the method for manufacturing a thin film transistor of the present invention.

FIGS. 1(a) to 1(g) are partial cross-sectional views at each step.

First, as shown in FIG. 1(a), a first conductive layer is deposited on an insulating substrate 9, and then, as shown in FIG. 1(b), the first conductive layer is patterned. A gate electrode 1 serving as a control electrode is formed.

Next, as shown in FIG. 1(C), a gate insulating layer 2. Semiconductor layer of non-single crystal semiconductor3. After successively forming an insulating layer 4 having a protector (hereinafter referred to as an insulating layer) as a second insulating layer, as shown in FIG. 1(d), the insulating layer 4 is etched. In the present invention, the opening is opened.

After forming the opening in the insulating layer 4, treatment is performed in a hydrogen plasma atmosphere to activate the surface of the semiconductor layer in the opening.

Next, as shown in FIG. 1(e), an ohmic contact layer 5 and a second conductive layer 6 are deposited, and then, as shown in FIG. 1(f), the conductive layer 6 is patterned to form a main layer. A source electrode 6a and a drain electrode 6b are formed, and then the ohmic contact layer 5 is removed by etching as shown in FIG. 1(g).

According to the method for manufacturing a thin film transistor of the present invention, the ohmic characteristics of the device can be significantly improved and stable electrical characteristics can be obtained.

In addition, since hydrogen plasma treatment and ohmic contact layer formation can be performed in the same chamber, there is no need to create a new process for activating the surface of the opening, providing a simple process and low-cost manufacturing method. can do.

Examples of the method for manufacturing a thin film transistor of the present invention will be described below.

Double-sided polished glass substrate (Corning #7059
) using a neutral detergent.
lt-0.1pm thick deposited, positive photoresist)
After forming a photoresist pattern in a desired shape using OFPR-800 (manufactured by Tokyo Ohka Kogyo Co., Ltd.), phosphoric acid (800
5% aqueous solution).

Nitric acid (60% aqueous solution), acetic acid and water 16:1:2:1
A pattern was formed by etching with a solution mixed in a volume ratio of (hereinafter referred to as "rAl etching solution"). After photoresist h'As, set the glass substrate in a capacitively coupled glow discharge decomposer and heat it to lX10-'3Torr+7).
Hydrogen diluted 10% Si H4 gas (manufactured by Komatsu Electronics) was added at 1010 °C in the zero-order device maintained at 200 °C under exhaust vacuum.
05e.

99.999% (7) N Hz gas 101005e
After setting the gas pressure to 0.4 Torr, RF (R
adio Frequency) Discharge power 200W
Glow discharge was performed for 20 minutes, and 3,000 people were
A XeH layer was formed.

Subsequently, 10%5iHn 300sec, gas pressure 0.
Glow discharge was performed for 30 minutes under the condition of 5 Torr with RF discharge power too, and hydrogenated amorphous (a-Si:H
) After forming the semiconductor layer (W2 thickness 2000 people), 10%
SiHn 100 sccm, NH: + 50 sec, gas pressure 0°4 Torr conditions - 1l' RF discharge power 300 W - t' Glow discharge for 30 minutes, SiN
A X:H layer (thickness: 3000 layers) was formed.

Next, a pattern is formed using positive photoresist,
Hydrofluoric acid (50% aqueous solution), ammonium fluoride (40%
aqueous solution) at a volume ratio of 1:40.
K: Etch HN3 to form an opening. Then, at the flow rate of H2101005e, the gas pressure was set to 0 and 2 Torr.
r, glow discharge was performed for 5 minutes at RF discharge power of 200 W, and then 10% SiH
4100scc m, hydrogen diluted PH3 gas 450se
cm, gas pressure 0.5 Torr, 4C1 glow discharge was performed with RF discharge power 200W, and Cr (II2 thickness 500 mm) was formed by zero-order sputtering to form an n middle layer (thickness too thick) of the ohmic contact layer. person), A
t (thickness: 5000).

A photoresist pattern is formed in the desired shape using a positive photoresist, and Cr is etched with a mixed aqueous solution of ceric ammonium nitrate and perchloric acid (etching solution for Cr).
A1 was etched using an etching solution for AI to form an electrode pattern.

Hydrofluoric acid (50% aqueous solution) using the electrode pattern as a mask,
The n middle layer was selectively etched and removed using a supersaturated solution of iodine in a mixture of nitric acid (70% aqueous solution) and acetic acid at a volume ratio of 2:10:88, and the photoresist was peeled off. I got it.

FIG. 2 shows the Id-Vd characteristics of a thin film transistor manufactured by the method for manufacturing a thin film transistor of the present invention.

As shown in the figure, it can be seen that almost sufficient ohmic characteristics were obtained by the manufacturing method of the present invention.

Although amorphous silicon is used as the semiconductor layer in the above embodiments, the present invention is not limited to this.
Any material may be used as long as it is non-monocrystalline silicon, such as polycrystalline silicon, and the second and second isolation layers may be made of other materials such as silicon oxide instead of silicon nitride.

In addition, non-single crystal silicon is suitably used as the semiconductor layer, and preferably non-single crystal silicon containing 0.001 to 20 at. May be used.

[Effects of the Invention] As explained in detail above, according to the Qll) transistor manufacturing method of the present invention, moisture adsorbed when forming the openings,
Impurities such as oxygen and hydrocarbons can be removed, and there is little damage to the semiconductor layer. Unlike when using other etching gases, the constituent elements of the etching gas do not remain, and sufficient ohmic contact is created. and stable electrical characteristics can be obtained. Further, the hydrogen plasma treatment can be performed in an n upper layer deposition chamber, which simplifies the device configuration and manufacturing process, and provides a highly reliable thin film transistor at low cost.

[Brief explanation of drawings]

FIG. 1 is an explanatory view showing the manufacturing process of one embodiment of the method for manufacturing a thin film transistor of the present invention. FIG. 2 shows the Id-Vd characteristics of a thin film transistor manufactured by the method for manufacturing a thin film transistor of the present invention. FIG. 3 is a structural diagram showing an example of a thin film transistor having an insulating layer having a protective function. FIG. 4 is a characteristic diagram of an example of the 6N film transistor. l...Gate electrode 2...Fist...Gate insulating layer 3...Fist...Semiconductor layer 4ΦΦ-Insulating layer 5...Ohmic contact layer 6...Conductive layer 6a *Fist...Φ Source electrode 6b Fist...-Drain electrode Representative Patent attorney Minoru Yamashita Lamb 1 Figure 8 Vd (V) Figure 3 (b) d

Claims (1)

[Claims] A step of forming a first conductive layer on an insulating substrate, forming a control electrode from this first conductive layer, and then sequentially forming a first insulating layer, a non-single crystal semiconductor layer, and a second insulating layer. forming an opening in the second insulating layer; performing hydrogen plasma treatment after forming the opening; and sequentially forming an ohmic contact layer and a second conductive layer on the second insulating layer. A method for manufacturing a thin film transistor, which includes the following steps: forming a main electrode from the second conductive layer; and removing unnecessary portions of the ohmic contact layer using the main electrode as a mask.