JPS6384014A - 半導体単結晶層の製造方法 - Google Patents

半導体単結晶層の製造方法

Info

Publication number
JPS6384014A
JPS6384014A JP61227187A JP22718786A JPS6384014A JP S6384014 A JPS6384014 A JP S6384014A JP 61227187 A JP61227187 A JP 61227187A JP 22718786 A JP22718786 A JP 22718786A JP S6384014 A JPS6384014 A JP S6384014A
Authority
JP
Japan
Prior art keywords
film
silicon
single crystal
crystal layer
porous
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP61227187A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0517693B2 (enrdf_load_stackoverflow
Inventor
Tomoyasu Inoue
井上　知泰
Toshihiko Hamazaki
浜崎　利彦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP61227187A priority Critical patent/JPS6384014A/ja
Publication of JPS6384014A publication Critical patent/JPS6384014A/ja
Publication of JPH0517693B2 publication Critical patent/JPH0517693B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02203—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being porous
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02488—Insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Recrystallisation Techniques (AREA)
JP61227187A 1986-09-27 1986-09-27 半導体単結晶層の製造方法 Granted JPS6384014A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61227187A JPS6384014A (ja) 1986-09-27 1986-09-27 半導体単結晶層の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61227187A JPS6384014A (ja) 1986-09-27 1986-09-27 半導体単結晶層の製造方法

Publications (2)

Publication Number Publication Date
JPS6384014A true JPS6384014A (ja) 1988-04-14
JPH0517693B2 JPH0517693B2 (enrdf_load_stackoverflow) 1993-03-09

Family

ID=16856852

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61227187A Granted JPS6384014A (ja) 1986-09-27 1986-09-27 半導体単結晶層の製造方法

Country Status (1)

Country Link
JP (1) JPS6384014A (enrdf_load_stackoverflow)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6392012A (ja) * 1986-10-01 1988-04-22 コーニング　グラス　ワークス 積層物品およびその製造方法
US5123975A (en) * 1989-03-28 1992-06-23 Ricoh Company, Ltd. Single crystal silicon substrate
US5405802A (en) * 1992-01-31 1995-04-11 Canon Kabushiki Kaisha Process of fabricating a semiconductor substrate
AT513692A1 (de) * 2012-12-10 2014-06-15 Tgw Logistics Group Gmbh Sortieranlage und Verfahren zum Sortieren von Objekten in einer Förderanlage

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6392012A (ja) * 1986-10-01 1988-04-22 コーニング　グラス　ワークス 積層物品およびその製造方法
US5123975A (en) * 1989-03-28 1992-06-23 Ricoh Company, Ltd. Single crystal silicon substrate
US5405802A (en) * 1992-01-31 1995-04-11 Canon Kabushiki Kaisha Process of fabricating a semiconductor substrate
US5679475A (en) * 1992-01-31 1997-10-21 Canon Kabushiki Kaisha Semiconductor substrate and process for preparing the same
AT513692A1 (de) * 2012-12-10 2014-06-15 Tgw Logistics Group Gmbh Sortieranlage und Verfahren zum Sortieren von Objekten in einer Förderanlage

Also Published As

Publication number Publication date
JPH0517693B2 (enrdf_load_stackoverflow) 1993-03-09

Similar Documents

Publication Publication Date Title
KR960001466B1 (ko) 반도체 재료 및 그 제작 방법 그리고 박막 트랜지스터
JPS58130517A (ja) 単結晶薄膜の製造方法
JPS60202952A (ja) 半導体装置の製造方法
GB2142346A (en) Method of formation of layer of multiconstituent material
JPS6384014A (ja) 半導体単結晶層の製造方法
JP3138174B2 (ja) シリコンまたはシリコン合金の低温選択的成長方法
JP2774855B2 (ja) ゲッタリング効果増強シリコン基板及びその製造方法
JPS63283013A (ja) 多結晶シリコン薄膜の形成方法
JPH0311727A (ja) 半導体薄膜の製造方法
JPH11251241A (ja) 結晶質珪素層の製造方法、太陽電池の製造方法及び薄膜トランジスタの製造方法
JPH01149483A (ja) 太陽電池
JPS61174621A (ja) 半導体薄膜結晶の製造方法
JP2706770B2 (ja) 半導体基板の製造方法
JPH0361335B2 (enrdf_load_stackoverflow)
JPH01149418A (ja) 電子素子用基板及びその製造方法
JPS6384013A (ja) 半導体結晶層の製造方法
JPS6012775B2 (ja) 異質基板上への単結晶半導体層形成方法
JPH02105517A (ja) 半導体装置の製造方法
JPH0334847B2 (enrdf_load_stackoverflow)
JP2861683B2 (ja) アモルファスシリコン膜の形成方法
JPH04151820A (ja) 半導体装置
Inoue et al. Electron-beam recrystallization of silicon layers on silicon dioxide
JPS5893218A (ja) 半導体薄膜構造の製造方法
JPH01294336A (ja) 電子放出素子の製造方法
JP2002118120A (ja) 薄膜トランジスタ及びその作製方法

Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term