JPS63831B2 - - Google Patents

Info

Publication number
JPS63831B2
JPS63831B2 JP58013310A JP1331083A JPS63831B2 JP S63831 B2 JPS63831 B2 JP S63831B2 JP 58013310 A JP58013310 A JP 58013310A JP 1331083 A JP1331083 A JP 1331083A JP S63831 B2 JPS63831 B2 JP S63831B2
Authority
JP
Japan
Prior art keywords
data
input
storage means
control
control device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58013310A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59139429A (ja
Inventor
Kenichi Maeda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP1331083A priority Critical patent/JPS59139429A/ja
Publication of JPS59139429A publication Critical patent/JPS59139429A/ja
Publication of JPS63831B2 publication Critical patent/JPS63831B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Information Transfer Systems (AREA)
JP1331083A 1983-01-28 1983-01-28 バツフア制御装置 Granted JPS59139429A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1331083A JPS59139429A (ja) 1983-01-28 1983-01-28 バツフア制御装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1331083A JPS59139429A (ja) 1983-01-28 1983-01-28 バツフア制御装置

Publications (2)

Publication Number Publication Date
JPS59139429A JPS59139429A (ja) 1984-08-10
JPS63831B2 true JPS63831B2 (enExample) 1988-01-08

Family

ID=11829597

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1331083A Granted JPS59139429A (ja) 1983-01-28 1983-01-28 バツフア制御装置

Country Status (1)

Country Link
JP (1) JPS59139429A (enExample)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5319504B2 (enExample) * 1973-08-14 1978-06-21
JPS539433A (en) * 1976-07-13 1978-01-27 Fujitsu Ltd Buffer memory control system

Also Published As

Publication number Publication date
JPS59139429A (ja) 1984-08-10

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