JPS6378428U - - Google Patents

Info

Publication number
JPS6378428U
JPS6378428U JP17115286U JP17115286U JPS6378428U JP S6378428 U JPS6378428 U JP S6378428U JP 17115286 U JP17115286 U JP 17115286U JP 17115286 U JP17115286 U JP 17115286U JP S6378428 U JPS6378428 U JP S6378428U
Authority
JP
Japan
Prior art keywords
signal
differentiating
differential
differential signal
digital signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17115286U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP17115286U priority Critical patent/JPS6378428U/ja
Publication of JPS6378428U publication Critical patent/JPS6378428U/ja
Pending legal-status Critical Current

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  • Manipulation Of Pulses (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本考案の実施例を示すブロツク回路
図、第2図は、第1図のブロツク回路の具体回路
図、第3図Aは、他の実施例を示す具体回路図、
第3図Bは、高域補償回路90の特性例を示す図
、第4図A及びBは、本考案回路と従来回路との
出力波形の相違を説明する為の波形図、第5図A
及びBは、本考案回路及び従来回路の波形整形回
路の各部出力波形を示す波形図、第6図は、従来
回路を示すブロツク回路図である。
1 is a block circuit diagram showing an embodiment of the present invention, FIG. 2 is a specific circuit diagram of the block circuit of FIG. 1, and FIG. 3A is a specific circuit diagram showing another embodiment.
3B is a diagram showing an example of the characteristics of the high-frequency compensation circuit 90, FIGS. 4A and 4B are waveform diagrams for explaining the difference in output waveforms between the circuit of the present invention and the conventional circuit, and FIG. 5A
and B are waveform diagrams showing the output waveforms of various parts of the waveform shaping circuit of the circuit of the present invention and the conventional circuit, and FIG. 6 is a block circuit diagram showing the conventional circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 入力デジタル信号を微分して第1微分信号を得
る第1微分手段と、前記入力デジタル信号と前記
第1微分信号とを加え合せて加算信号を得る加算
手段と、前記加算信号を微分して第2微分信号を
得る第2微分手段と、前記加算信号と前記第2微
分信号との差信号を得る減算手段とを含み、前記
差信号を出力信号とするデジタル信号波形整形回
路であつて、前記加算信号及び前記第2微分信号
相互の位相偏倚を一定にする位相補償手段と、前
記差信号の高域成分のレベルを上昇せしめる高域
補償手段とを備えたことを特徴とするデジタル信
号波形整形回路。
a first differentiating means for differentiating an input digital signal to obtain a first differential signal; an adding means for adding the input digital signal and the first differential signal to obtain a sum signal; and a first differentiator for differentiating the sum signal to obtain a first differential signal. A digital signal waveform shaping circuit comprising a second differentiating means for obtaining a second differential signal, and a subtracting means for obtaining a difference signal between the addition signal and the second differential signal, the digital signal waveform shaping circuit having the difference signal as an output signal, Digital signal waveform shaping, characterized by comprising: phase compensation means for making constant phase deviation between the addition signal and the second differential signal; and high-frequency compensation means for increasing the level of high-frequency components of the difference signal. circuit.
JP17115286U 1986-11-06 1986-11-06 Pending JPS6378428U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17115286U JPS6378428U (en) 1986-11-06 1986-11-06

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17115286U JPS6378428U (en) 1986-11-06 1986-11-06

Publications (1)

Publication Number Publication Date
JPS6378428U true JPS6378428U (en) 1988-05-24

Family

ID=31106522

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17115286U Pending JPS6378428U (en) 1986-11-06 1986-11-06

Country Status (1)

Country Link
JP (1) JPS6378428U (en)

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