JPS6293829U - - Google Patents
Info
- Publication number
- JPS6293829U JPS6293829U JP18302285U JP18302285U JPS6293829U JP S6293829 U JPS6293829 U JP S6293829U JP 18302285 U JP18302285 U JP 18302285U JP 18302285 U JP18302285 U JP 18302285U JP S6293829 U JPS6293829 U JP S6293829U
- Authority
- JP
- Japan
- Prior art keywords
- comparator
- circuit
- outputs
- amplifier
- pull
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000005540 biological transmission Effects 0.000 claims 1
- 238000005070 sampling Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 8
Landscapes
- Manipulation Of Pulses (AREA)
- Dc Digital Transmission (AREA)
Description
第1図は本考案の一実施例を示す回路図、第2
図第3図第4図はそれぞれ第1図の動作例におけ
る波形図、第5図は一従来例を示す回路図、第6
図第7図はそれぞれ第5図の動作例における波形
図、第8図は他の従来例を示す回路図、第9図第
10図はそれぞれ第8図の動作例における波形図
である。
11:アンプ、13,14:コンパレータ、1
5:J−Kフリツプフロツプ、C1R1,C2R
2:積分回路、(R3,+V),(R4,−V)
:プルアツプ回路。
Figure 1 is a circuit diagram showing one embodiment of the present invention, Figure 2 is a circuit diagram showing an embodiment of the present invention.
Figures 3 and 4 are waveform diagrams in the operation example shown in Figure 1, Figure 5 is a circuit diagram showing a conventional example, and Figure 6 is a circuit diagram showing a conventional example.
7 is a waveform diagram for the operation example shown in FIG. 5, FIG. 8 is a circuit diagram showing another conventional example, and FIGS. 9 and 10 are waveform diagrams for the operation example shown in FIG. 8, respectively. 11: Amplifier, 13, 14: Comparator, 1
5: J-K flip-flop, C 1 R 1 , C 2 R
2 : Integrating circuit, (R 3 , +V), (R 4 , -V)
:Pull-up circuit.
Claims (1)
プ出力のうち一方が直接、他方が積分回路を介し
プルアツプ回路を伴つて入力される第1のコンパ
レータと、前記アンプの出力を一方が直接、他方
が積分回路を介してプルアツプ回路を伴つて入力
される第2のコンパレータと、第1のコンパレー
タと第2のコンパレータ出力を入力とし、データ
の周波数に比して格段に高い周波数でサンプリン
グし、いずれか一方を出力するJ−Kフリツプフ
ロツプとを具備したことを特徴とするレシーバ回
路。 an amplifier for receiving and amplifying a transmission signal; a first comparator to which one of the outputs of the amplifier is inputted directly and the other is inputted via an integrating circuit with a pull-up circuit; A second comparator input with a pull-up circuit via an integrating circuit, the outputs of the first comparator and the second comparator are input, and sampling is performed at a frequency much higher than the frequency of the data. 1. A receiver circuit comprising a J-K flip-flop that outputs one side.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18302285U JPH0445298Y2 (en) | 1985-11-29 | 1985-11-29 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18302285U JPH0445298Y2 (en) | 1985-11-29 | 1985-11-29 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6293829U true JPS6293829U (en) | 1987-06-15 |
JPH0445298Y2 JPH0445298Y2 (en) | 1992-10-26 |
Family
ID=31129369
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18302285U Expired JPH0445298Y2 (en) | 1985-11-29 | 1985-11-29 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0445298Y2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2011244241A (en) * | 2010-05-19 | 2011-12-01 | Mitsubishi Electric Corp | Receiver, communication system, and reception method |
-
1985
- 1985-11-29 JP JP18302285U patent/JPH0445298Y2/ja not_active Expired
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2011244241A (en) * | 2010-05-19 | 2011-12-01 | Mitsubishi Electric Corp | Receiver, communication system, and reception method |
Also Published As
Publication number | Publication date |
---|---|
JPH0445298Y2 (en) | 1992-10-26 |
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