JPH03110663U - - Google Patents
Info
- Publication number
- JPH03110663U JPH03110663U JP1674390U JP1674390U JPH03110663U JP H03110663 U JPH03110663 U JP H03110663U JP 1674390 U JP1674390 U JP 1674390U JP 1674390 U JP1674390 U JP 1674390U JP H03110663 U JPH03110663 U JP H03110663U
- Authority
- JP
- Japan
- Prior art keywords
- comparator
- signal
- inputted
- input signal
- active filter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Signal Processing For Digital Recording And Reproducing (AREA)
Description
第１図〜第３図はこの考案の一実施例を示す図
で、第１図は回路構成を示すブロツク図、第２図
は回路構成を示す結線図、第３図は第１図の各部
の信号波形の一例を示すタイミングチヤート、第
４図は従来の復調回路の回路構成を示すブロツク
図、第５図及び第６図はそれぞれ第４図の各部の
信号波形を示すタイミングチヤートである。
２１……増幅器、２２……アクテイブフイルタ
（ＬＰＦ）、２３……ウインドコンパレータ、２
４……インピーダンス変換器、２５，３６……Ｆ
／Ｆ回路、３１……入力端子、３２……第１のオ
ペアンプ、３３……第２のオペアンプ、３４……
第１のコンパレータ、３５……第２のコンパレー
タ、３７……出力端子。
Figures 1 to 3 are diagrams showing an embodiment of this invention. Figure 1 is a block diagram showing the circuit configuration, Figure 2 is a wiring diagram showing the circuit configuration, and Figure 3 is each part of Figure 1. FIG. 4 is a block diagram showing the circuit configuration of a conventional demodulation circuit, and FIGS. 5 and 6 are timing charts showing signal waveforms at various parts of FIG. 4, respectively. 21...Amplifier, 22...Active filter (LPF), 23...Window comparator, 2
4... Impedance converter, 25, 36...F
/F circuit, 31...input terminal, 32...first operational amplifier, 33...second operational amplifier, 34...
First comparator, 35...second comparator, 37...output terminal.
Claims (1)
近い値にカツトオフ周波数が設定されたアクテイ
ブフイルタと、 このアクテイブフイルタの出力信号がそれぞれ
のコンパレータの基準値を個々に可変するように
コンパレート端子に入力され、前記入力信号がそ
れぞれのコンパレータのデータ入力端子に入力さ
れて比較されるウインドコンパレータと、 このウインドコンパレータの出力信号が入力さ
れＰＷＭ信号のデータ復調信号を出力するフリツ
プフロツプ回路と を具備したことを特徴とする復調回路。[Claims for Utility Model Registration] An active filter to which an input signal is applied and whose cutoff frequency is set to a value close to the fundamental frequency of the PWM signal, and an output signal of this active filter that individually varies the reference value of each comparator. a window comparator, into which the input signal is inputted to the comparator terminal, and the input signal is inputted into the data input terminal of each comparator and compared; and a flip-flop, into which the output signal of the window comparator is inputted, and outputs a data demodulated signal of the PWM signal. A demodulation circuit characterized by comprising a circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1674390U JPH03110663U (en) | 1990-02-23 | 1990-02-23 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1674390U JPH03110663U (en) | 1990-02-23 | 1990-02-23 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03110663U true JPH03110663U (en) | 1991-11-13 |
Family
ID=31519999
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1674390U Pending JPH03110663U (en) | 1990-02-23 | 1990-02-23 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03110663U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009191413A (en) * | 2008-02-15 | 2009-08-27 | Pigeon Corp | Reforming foundation |
-
1990
- 1990-02-23 JP JP1674390U patent/JPH03110663U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009191413A (en) * | 2008-02-15 | 2009-08-27 | Pigeon Corp | Reforming foundation |
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