JPS6378212A - Semiconductor device - Google Patents

Abstract

PURPOSE:To improve the reliability of a system in terms of coping with the fluctuation of a power source voltage by incorporating a circuit detecting the fluctuation exceeding the rated value of the power source voltage in order to cope with said fluctuation. CONSTITUTION:If a voltage impressed on a power source terminal 1 drops temporarily to be lower than the regulated value, the detection circuit 5 detects the effect, generates a detection signal and writes it in a storage circuit 6. A CPU outside the titled device reads contents in the circuit 6, or an output terminal 8 outputting said contents to the outside is monitored. Therefore, the occurrence of malfunction is recognized and processing is made. Thanks to such a constitution, malfunction can be previously prevented, or even if malfunction occurs, an operator instantaneously copes with that. Consequently, the reliability of the system can be improved in terms of coping with the fluctuation of the power source voltage.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to semiconductor devices, and particularly to circuit countermeasures against malfunctions caused by fluctuations in power supply voltage.

[Conventional technology]

FIGS. 3 and 4 are block diagrams showing an example of a system in which circuit countermeasures are taken when a malfunction occurs due to variations in power supply voltage in a conventional device. Fig. 3 shows an illegal area access error detection circuit that detects when the central processing unit (hereinafter abbreviated as CPU) has illegally accessed an area in which memory is not installed, and Fig. 4 shows an illegal area access error detection circuit that detects when the central processing unit (hereinafter abbreviated as CPU) has illegally accessed an area where the memory is not installed. This shows a timeout error detection circuit that detects when the program area is not accessed (timeout error) as a result of runaway.

In Figure 3, 7C is the CPU, 10 is an address signal output from the CPU, lla is an address decoder, 12 is an invalid address error signal indicating that the CPU has accessed an area with no memory, and 13 is an area where the CPU is programmed. 14 is a timer counter whose count value is reset by the program area access signal. 15 is a timeout error signal that is output when the timer counter reaches a certain value. .

Next, the operation will be explained.

FIG. 3 explains the invalid address error detection circuit of the CPU 7c. Due to a drop in the power supply voltage, the cpU 7c (i) reads an instruction incorrectly, (11) reads data incorrectly, (iii) reads an instruction or data. mishandling (iv
) Malfunctions of external circuits may cause malfunctions such as erroneous processing, resulting in erroneous access to external memory. Address decoder 11 is CPU address 10
When a selection signal is output to a memory address where no memory is mounted, this is used as an illegal area access error detection signal 12 to display an error or generate an interrupt for error processing.

Further, as a modification of the above conventional example, an address in which a read-only memory is mounted may be selected (logical product of No. 8 and a write signal is taken) and used as an unauthorized write error detection signal.

Figure 4 explains a circuit that detects runaway and stoppage of the CPU 7c, and as mentioned above, the CPU 7c detects runaway and stoppage.
The PU may run out of control and stop due to the causes (i) to (iv) described above. At this time, the CPU does not access the originally used program area for a long time. To detect this, the address signal 10 of the CPU 7c is decoded by the address decoder 11, and the timer counter 14 is reset each time by the program area selection signal 13. If the CPU 7C stops accessing the program area due to runaway or stoppage, the timer counter 14 continues counting and amplifying for a certain period of time, and counts up after Et to generate a timeout error signal 15.

[Problem that the invention seeks to solve]

Conventional malfunction detection devices are configured as described above, so they are unable to detect 100% of malfunctions due to power supply voltage fluctuations, and even if they are able to detect malfunctions, they are not detected until the CPU generates an invalid address error or timeout error. Therefore, there is a time delay from when a malfunction first occurs to when it is detected.For this reason, even if the occurrence of a malfunction can be detected, there may be cases where no action can be taken against the occurrence of the malfunction.

The present invention has been made to solve the problems of such conventional devices, and can detect 100% of malfunction occurrences, and can detect system power supply voltage fluctuations by detecting malfunctions immediately or in advance. The objective is to obtain a semiconductor device with improved reliability.

[Means for solving problems]

The semiconductor device according to the present invention adds a circuit to the device itself to detect that the power supply voltage applied to the device has changed beyond the standard range, and also outputs an internal status signal detection signal to the outside or interrupts the device. A function has been added to notify the fluctuation of the power supply voltage by the occurrence of the change.

[Effect]

In this invention, by incorporating a circuit that absorbs fluctuations in the power supply voltage that exceed the standard value, malfunctions can be prevented or even if malfunctions occur, they can be dealt with immediately. System reliability against power supply voltage fluctuations is improved.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. 1st
The figure shows one embodiment of the present invention. In the figure, 4 is a semiconductor device that is the subject of the present invention, 1 is a first power supply terminal that supplies a power supply voltage to the semiconductor device 4, 2 is a ground terminal that supplies a ground potential, and 5 is a voltage applied to terminal 1. 6 is a memory circuit that stores and holds the food output signal of the detection circuit 5; 3 is a second power supply terminal that supplies the power supply voltage to the circuit 5.6; 7a is a An internal circuit that realizes the functions of this semiconductor device is a terminal 8 that outputs information (U) indicating that a fluctuation in the power supply voltage has occurred externally.

Further, FIG. 2 shows a semiconductor device incorporating a central processing unit according to another embodiment of the present invention, in which 1 to 5 are the same as those in FIG. 1, 7b is a central processing bag, and 9 is a detection device. This is an interrupt circuit that operates upon receiving a power supply voltage fluctuation detection signal from the circuit 5.

Next, the operation shown in FIG. 1 will be explained. First, in the diagram, terminal 1
．． 3 is supplied with power from a separate system. However, to prevent the effects of a power outage accident, the power is connected to terminal 3.

It is desirable that an uninterruptible power source such as a DC power source be applied.

If the voltage applied to the power supply terminal 1 drops temporarily due to a momentary power outage or an abnormality in the power supply, and this voltage value becomes lower than the specified value (usually within the guaranteed operation range of the semiconductor device), the detection circuit 5 This is detected, a detection signal is generated, and data is written into the memory circuit 6. The occurrence of a malfunction is confirmed by reading the contents of this memory circuit 6 by a CPU external to the wooden device or by monitoring the output terminal 8 which outputs the contents of the memory circuit to the outside, and appropriate processing is performed.

FIG. 2 shows a case where the present invention is applied to a central processing unit, and the detection signal output from the detection device 5 is input to the interrupt generation circuit 9, causing the central processing unit 7b to perform processing corresponding to the malfunction.

In the above embodiment, the power supply for the circuit for detecting a drop in the power supply voltage is provided in a separate system, but it is of course possible to use the same power supply as the semiconductor device by devising the circuit.

Further, although the embodiment shown in FIG. 1 has a memory circuit, it is of course possible to omit the memory circuit.

Further, although the embodiment shown in FIG. 1 shows a case where the detection signal is outputted to the outside of the semiconductor device, the detection signal may be outputted to the internal circuit as an internal status signal. It has the same effect as.

Furthermore, although the embodiment shown in FIG. 2 above has a built-in central processing unit and an interrupt generation circuit, the separate interrupt generation circuit may also have a memory circuit, and the same effect as in the above embodiment can be obtained. play.

〔Effect of the invention〕

As described above, according to the present invention, by adding a circuit for detecting a drop in the power supply voltage, it is possible to detect a malfunction before it occurs, and even if the power supply voltage fluctuates suddenly and Even if a malfunction occurs, it can be detected immediately and 100%, and a highly reliable semiconductor device can be obtained.

[BRIEF DESCRIPTION OF THE DRAWINGS] FIG. 1 is a diagram showing a semiconductor device incorporating a circuit for detecting power supply voltage fluctuation according to an embodiment of the present invention, and FIG. 2 is a diagram showing a semiconductor device according to another embodiment of the present invention. FIG. 3 is a diagram showing a central processing unit with a built-in circuit for detecting voltage fluctuations, FIG. 3 is a diagram showing an example of a circuit for detecting a conventional illegal area access error, and FIG. 4 is a diagram showing an example of a circuit for detecting a timeout error. be. In the figure, 1 is a first power supply terminal, 2 is a ground terminal, 3 is a second power supply terminal, 4 is a semiconductor device, 5 is a detection circuit, 6 is a memory circuit, 7a is an internal circuit, 7b is a central processing unit, 7c is a central processing unit in the system, 8 is a power supply voltage fluctuation detection signal output terminal, 9 is an interrupt generation circuit, 10 is an address signal for the central processing unit, 11 is an address decoder, 12 is an illegal area access error detection signal, and 13 is a A program area access signal, 14 a timer count, and 15 a timeout error detection circuit.

Claims (4)

[Claims] (1) A semiconductor device designed to operate under a power supply voltage within a predetermined range, characterized by having a built-in detection circuit that detects when the voltage value of the power supply voltage changes beyond a specified range. semiconductor device. (2) The semiconductor device according to claim 1, further comprising a built-in storage circuit that holds the signal from the detection circuit. (3) Claim 1 characterized in that it has an external terminal for outputting the detection signal of the detection circuit to the outside.
1. Semiconductor device described in Section 1. (4) The semiconductor device according to claim 1, further comprising an interrupt generation circuit that generates an interrupt to the built-in central processing unit in response to a detection signal from the detection circuit.