JPS6373931U - - Google Patents

Info

Publication number
JPS6373931U
JPS6373931U JP16771886U JP16771886U JPS6373931U JP S6373931 U JPS6373931 U JP S6373931U JP 16771886 U JP16771886 U JP 16771886U JP 16771886 U JP16771886 U JP 16771886U JP S6373931 U JPS6373931 U JP S6373931U
Authority
JP
Japan
Prior art keywords
lead frame
heater block
pellet bonding
block
frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16771886U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP16771886U priority Critical patent/JPS6373931U/ja
Publication of JPS6373931U publication Critical patent/JPS6373931U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Wire Bonding (AREA)
  • Die Bonding (AREA)

Description

【図面の簡単な説明】
第1図は本考案の一実施例の平面図、第2図は
AA′断面図である。 1……ヒータブロツク、2……フレーム受け溝
、2a……凹部、2b……溝。

Claims (1)

  1. 【実用新案登録請求の範囲】 半導体集積回路ペレツトのリードフレームへの
    ペレツトボンデイング作業に用いるヒータブロツ
    クとして、 ブロツクの平担な主表面に、リードフレームの
    形状に合わせたフレーム受け溝を設けたことを特
    徴とするペレツトボンデイング用ヒータブロツク
JP16771886U 1986-10-30 1986-10-30 Pending JPS6373931U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16771886U JPS6373931U (ja) 1986-10-30 1986-10-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16771886U JPS6373931U (ja) 1986-10-30 1986-10-30

Publications (1)

Publication Number Publication Date
JPS6373931U true JPS6373931U (ja) 1988-05-17

Family

ID=31099910

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16771886U Pending JPS6373931U (ja) 1986-10-30 1986-10-30

Country Status (1)

Country Link
JP (1) JPS6373931U (ja)

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