JPS6365987B2 - - Google Patents

Info

Publication number
JPS6365987B2
JPS6365987B2 JP13650583A JP13650583A JPS6365987B2 JP S6365987 B2 JPS6365987 B2 JP S6365987B2 JP 13650583 A JP13650583 A JP 13650583A JP 13650583 A JP13650583 A JP 13650583A JP S6365987 B2 JPS6365987 B2 JP S6365987B2
Authority
JP
Japan
Prior art keywords
counter
packet
processing
position information
relative position
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP13650583A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6028345A (ja
Inventor
Morio Ikesaka
Keiji Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58136505A priority Critical patent/JPS6028345A/ja
Publication of JPS6028345A publication Critical patent/JPS6028345A/ja
Publication of JPS6365987B2 publication Critical patent/JPS6365987B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
    • G06F15/8023—Two dimensional arrays, e.g. mesh, torus

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
JP58136505A 1983-07-26 1983-07-26 並列計算機における通信方式 Granted JPS6028345A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58136505A JPS6028345A (ja) 1983-07-26 1983-07-26 並列計算機における通信方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58136505A JPS6028345A (ja) 1983-07-26 1983-07-26 並列計算機における通信方式

Publications (2)

Publication Number Publication Date
JPS6028345A JPS6028345A (ja) 1985-02-13
JPS6365987B2 true JPS6365987B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1988-12-19

Family

ID=15176727

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58136505A Granted JPS6028345A (ja) 1983-07-26 1983-07-26 並列計算機における通信方式

Country Status (1)

Country Link
JP (1) JPS6028345A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH042492U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1990-04-19 1992-01-10

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6395559A (ja) * 1986-10-13 1988-04-26 Mitsubishi Electric Corp 配列計算機用プロセツサ
JP2543878B2 (ja) * 1987-03-31 1996-10-16 株式会社東芝 並列処理システム
JPS63293668A (ja) * 1987-05-27 1988-11-30 Matsushita Electric Ind Co Ltd 並列計算機の通信方法
JP2657090B2 (ja) * 1989-03-14 1997-09-24 三洋電機株式会社 計算機のデータ通信システム
JPH0338132A (ja) * 1989-07-04 1991-02-19 Hitachi Ltd 中継回線選択方式
JP3087900B2 (ja) * 1989-09-18 2000-09-11 富士通株式会社 並列計算機を構成する計算機ノード
GB2393280B (en) * 2002-09-17 2006-01-18 Micron Europe Ltd Method for manipulating data in a group of processing elements to transpose the data using a memory stack
US7913062B2 (en) 2003-04-23 2011-03-22 Micron Technology, Inc. Method of rotating data in a plurality of processing elements
US7581080B2 (en) 2003-04-23 2009-08-25 Micron Technology, Inc. Method for manipulating data in a group of processing elements according to locally maintained counts
US7676648B2 (en) 2003-04-23 2010-03-09 Micron Technology, Inc. Method for manipulating data in a group of processing elements to perform a reflection of the data
US7596678B2 (en) 2003-04-23 2009-09-29 Micron Technology, Inc. Method of shifting data along diagonals in a group of processing elements to transpose the data
JP2005295236A (ja) * 2004-03-31 2005-10-20 Serukurosu:Kk 通信装置
US10049322B2 (en) 2015-05-21 2018-08-14 Google Llc Prefetching weights for use in a neural network processor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH042492U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1990-04-19 1992-01-10

Also Published As

Publication number Publication date
JPS6028345A (ja) 1985-02-13

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