JPS6356574B2 - - Google Patents
Info
- Publication number
- JPS6356574B2 JPS6356574B2 JP58180005A JP18000583A JPS6356574B2 JP S6356574 B2 JPS6356574 B2 JP S6356574B2 JP 58180005 A JP58180005 A JP 58180005A JP 18000583 A JP18000583 A JP 18000583A JP S6356574 B2 JPS6356574 B2 JP S6356574B2
- Authority
- JP
- Japan
- Prior art keywords
- data
- transferred
- transfer
- processing device
- data processing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/17—Interprocessor communication using an input/output type connection, e.g. channel, I/O port
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multi Processors (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58180005A JPS6072059A (ja) | 1983-09-28 | 1983-09-28 | デ−タ転送制御方式 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58180005A JPS6072059A (ja) | 1983-09-28 | 1983-09-28 | デ−タ転送制御方式 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6072059A JPS6072059A (ja) | 1985-04-24 |
| JPS6356574B2 true JPS6356574B2 (cs) | 1988-11-08 |
Family
ID=16075786
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58180005A Granted JPS6072059A (ja) | 1983-09-28 | 1983-09-28 | デ−タ転送制御方式 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6072059A (cs) |
-
1983
- 1983-09-28 JP JP58180005A patent/JPS6072059A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6072059A (ja) | 1985-04-24 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5594882A (en) | PCI split transactions utilizing dual address cycle | |
| US6763402B2 (en) | Data storage subsystem | |
| JPS6356574B2 (cs) | ||
| US7062593B2 (en) | Circuit system and method for data transmission between LPC devices | |
| JP2003085017A (ja) | データ保証システム | |
| US6487679B1 (en) | Error recovery mechanism for a high-performance interconnect | |
| US12271260B2 (en) | Method to retrieve transaction address resulting in an uncorrectable PCIe error | |
| JPH06236340A (ja) | データ転送方法及び転送装置 | |
| JP2840536B2 (ja) | バス接続制御装置 | |
| JP3262130B2 (ja) | 情報処理装置 | |
| JP2000155738A (ja) | データ処理装置 | |
| JP2533886B2 (ja) | デ―タ転送方式 | |
| CN114911736A (zh) | 一种主从机系统 | |
| JPS5911927B2 (ja) | アドレス障害処理方式 | |
| JPH0429101B2 (cs) | ||
| JPH01175656A (ja) | 高速データ転送方式 | |
| JPH076117A (ja) | データ転送方式及びデータ転送装置 | |
| JPH07109599B2 (ja) | 処理システムの情報転送装置 | |
| JPS6378257A (ja) | 入出力制御装置 | |
| JPH0261746A (ja) | Dma制御方式 | |
| JPH01311350A (ja) | チャネル・インターフェイス回路 | |
| JPH0395652A (ja) | 二重化システム用記憶装置 | |
| JPH04349559A (ja) | 情報処理装置 | |
| JPH05250300A (ja) | 情報処理装置 | |
| JPH05128043A (ja) | データ転送制御方式 |