JPS6347158B2 - - Google Patents

Info

Publication number
JPS6347158B2
JPS6347158B2 JP56137931A JP13793181A JPS6347158B2 JP S6347158 B2 JPS6347158 B2 JP S6347158B2 JP 56137931 A JP56137931 A JP 56137931A JP 13793181 A JP13793181 A JP 13793181A JP S6347158 B2 JPS6347158 B2 JP S6347158B2
Authority
JP
Japan
Prior art keywords
copper
hole
copper foil
layer
insulating layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56137931A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5839099A (ja
Inventor
Akihiro Aketo
Kazumori Baba
Hideo Saito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP13793181A priority Critical patent/JPS5839099A/ja
Publication of JPS5839099A publication Critical patent/JPS5839099A/ja
Publication of JPS6347158B2 publication Critical patent/JPS6347158B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
JP13793181A 1981-08-31 1981-08-31 多層印刷回路基板の製造方法 Granted JPS5839099A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13793181A JPS5839099A (ja) 1981-08-31 1981-08-31 多層印刷回路基板の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13793181A JPS5839099A (ja) 1981-08-31 1981-08-31 多層印刷回路基板の製造方法

Publications (2)

Publication Number Publication Date
JPS5839099A JPS5839099A (ja) 1983-03-07
JPS6347158B2 true JPS6347158B2 (ko) 1988-09-20

Family

ID=15210029

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13793181A Granted JPS5839099A (ja) 1981-08-31 1981-08-31 多層印刷回路基板の製造方法

Country Status (1)

Country Link
JP (1) JPS5839099A (ko)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6247197A (ja) * 1985-08-26 1987-02-28 日立コンデンサ株式会社 多層配線板の製造方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5110329A (ja) * 1974-07-05 1976-01-27 Hitachi Ltd Teidenatsuhenatsuki
JPS5241868A (en) * 1975-09-29 1977-03-31 Tokyo Purinto Kougiyou Kk Method of producing multiilayer printed circuit board
JPS5426472A (en) * 1977-07-30 1979-02-28 Matsushita Electric Works Ltd Method of manufacturing multiilayer printed wiring board
JPS5638038A (en) * 1979-08-01 1981-04-13 Toray Ind Inc Photosensitive polyimide precursor

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5110329A (ja) * 1974-07-05 1976-01-27 Hitachi Ltd Teidenatsuhenatsuki
JPS5241868A (en) * 1975-09-29 1977-03-31 Tokyo Purinto Kougiyou Kk Method of producing multiilayer printed circuit board
JPS5426472A (en) * 1977-07-30 1979-02-28 Matsushita Electric Works Ltd Method of manufacturing multiilayer printed wiring board
JPS5638038A (en) * 1979-08-01 1981-04-13 Toray Ind Inc Photosensitive polyimide precursor

Also Published As

Publication number Publication date
JPS5839099A (ja) 1983-03-07

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