JPS6346838U - - Google Patents
Info
- Publication number
- JPS6346838U JPS6346838U JP13931486U JP13931486U JPS6346838U JP S6346838 U JPS6346838 U JP S6346838U JP 13931486 U JP13931486 U JP 13931486U JP 13931486 U JP13931486 U JP 13931486U JP S6346838 U JPS6346838 U JP S6346838U
- Authority
- JP
- Japan
- Prior art keywords
- wafer
- orientation flat
- grounded
- electron beam
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000009825 accumulation Methods 0.000 claims 1
- 238000000609 electron-beam lithography Methods 0.000 claims 1
- 239000000758 substrate Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
Landscapes
- Electron Beam Exposure (AREA)
- Elimination Of Static Electricity (AREA)
Description
第１図は本考案に用いるウエーハを示す図、第
２図は本考案の一実施例を示す図、第３図はＡ―
Ａ′断面図である。
１……酸化処理後のウエーハ、２……オリフラ
、３……ウエーハ基盤、４……酸化ウエーハ、５
……オリフラ押え、６……ピエゾ、７……押しバ
ネ、８……ピエゾ、９……押しバネ、１０……ウ
エーハカセツト、１１……オリフラ。
Fig. 1 is a diagram showing a wafer used in the present invention, Fig. 2 is a diagram showing an embodiment of the present invention, and Fig. 3 is a diagram showing a wafer used in the present invention.
It is an A' sectional view. 1... Wafer after oxidation treatment, 2... Orientation flat, 3... Wafer base, 4... Oxidized wafer, 5
... Orientation flat presser foot, 6 ... Piezo, 7 ... Push spring, 8 ... Piezo, 9 ... Push spring, 10 ... Wafer cassette, 11 ... Orientation flat.
Claims (1)
なるウエハカセツトにおいて、ウエーハオリフラ
部に基盤が直接露出する部分を装填前に設け、こ
の部分でウエハカセツトに接地して、ウエーハ内
の静電蓄積を防止したことを特徴とする電子線描
画装置。 In a wafer cassette consisting of a wafer and a presser holding the wafer, etc., a part where the substrate is directly exposed is provided at the wafer orientation flat part before loading, and this part is grounded to the wafer cassette to prevent electrostatic accumulation within the wafer. An electron beam lithography device featuring:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13931486U JPS6346838U (en) | 1986-09-12 | 1986-09-12 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13931486U JPS6346838U (en) | 1986-09-12 | 1986-09-12 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6346838U true JPS6346838U (en) | 1988-03-30 |
Family
ID=31045105
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13931486U Pending JPS6346838U (en) | 1986-09-12 | 1986-09-12 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6346838U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2016535432A (en) * | 2013-09-27 | 2016-11-10 | エルピーイー ソシエタ ペル アチオニ | Susceptor with support element |
-
1986
- 1986-09-12 JP JP13931486U patent/JPS6346838U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2016535432A (en) * | 2013-09-27 | 2016-11-10 | エルピーイー ソシエタ ペル アチオニ | Susceptor with support element |