JPS6346466B2 - - Google Patents

Info

Publication number
JPS6346466B2
JPS6346466B2 JP56208772A JP20877281A JPS6346466B2 JP S6346466 B2 JPS6346466 B2 JP S6346466B2 JP 56208772 A JP56208772 A JP 56208772A JP 20877281 A JP20877281 A JP 20877281A JP S6346466 B2 JPS6346466 B2 JP S6346466B2
Authority
JP
Japan
Prior art keywords
program
memory
address
chip
operating system
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56208772A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58109957A (ja
Inventor
Hiroshi Kadota
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP56208772A priority Critical patent/JPS58109957A/ja
Publication of JPS58109957A publication Critical patent/JPS58109957A/ja
Publication of JPS6346466B2 publication Critical patent/JPS6346466B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Microcomputers (AREA)
  • Storage Device Security (AREA)
JP56208772A 1981-12-23 1981-12-23 シングルチツプマイクロコンピユ−タシステム Granted JPS58109957A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56208772A JPS58109957A (ja) 1981-12-23 1981-12-23 シングルチツプマイクロコンピユ−タシステム

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56208772A JPS58109957A (ja) 1981-12-23 1981-12-23 シングルチツプマイクロコンピユ−タシステム

Publications (2)

Publication Number Publication Date
JPS58109957A JPS58109957A (ja) 1983-06-30
JPS6346466B2 true JPS6346466B2 (enExample) 1988-09-14

Family

ID=16561833

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56208772A Granted JPS58109957A (ja) 1981-12-23 1981-12-23 シングルチツプマイクロコンピユ−タシステム

Country Status (1)

Country Link
JP (1) JPS58109957A (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6068441A (ja) * 1983-09-22 1985-04-19 Fujitsu Ltd ワンチツプ・マイクロ・コンピユ−タ
JPS6459542A (en) * 1987-08-31 1989-03-07 Nec Corp Single chip microcomputer
JP3023425B2 (ja) * 1987-10-09 2000-03-21 株式会社日立製作所 データ処理装置
JPH0314052A (ja) * 1989-06-12 1991-01-22 Toshiba Corp 携帯可能媒体
JP2002014737A (ja) * 2000-06-29 2002-01-18 Fujitsu Ltd 処理装置、集積回路、および集積回路パッケージ

Also Published As

Publication number Publication date
JPS58109957A (ja) 1983-06-30

Similar Documents

Publication Publication Date Title
US5640542A (en) On-chip in-circuit-emulator memory mapping and breakpoint register modules
US4698750A (en) Security for integrated circuit microcomputer with EEPROM
US5305460A (en) Data processor
JPH01219982A (ja) Ｉｃカード
JPH0395650A (ja) キャシュ動作不能アドレスランダムアクセスメモリ
JPS6346466B2 (enExample)
US12271289B2 (en) System on a chip with an integrated configurable safety master microcontroller unit
US7555627B2 (en) Input-output control apparatus, input-output control method, process control apparatus and process control method
KR100223096B1 (ko) 내부 메모리 맵 레지스터를 관측하는 방법 및 장치
US6560698B1 (en) Register change summary resource
JP3202696B2 (ja) 信号処理装置
US20010049794A1 (en) Write protection software for programmable chip
KR100238174B1 (ko) 병렬 프로세서 시스템
JPS6074059A (ja) 記憶装置アクセス制御方式
JP2597409B2 (ja) マイクロコンピュータ
JP3323341B2 (ja) エミュレーション用プロセッサおよびそれを搭載したエミュレータ
JPH0652507B2 (ja) マイクロコンピユ−タの開発装置
JP3166667B2 (ja) エミュレーション用マイクロコンピュータ
KR940006823B1 (ko) 메모리 라이트 보호회로
JPH03228146A (ja) Ｅｅｐｒｏｍ内蔵マイクロコンピュータ
JPS63208953A (ja) マイクロコンピユ−タ
JPH0217563A (ja) 共有メモリの初期化方法
JPS59121455A (ja) プレフイクシング方式
JPH02105240A (ja) 仮想記憶管理装置
JPS61133436A (ja) デ−タ処理装置