JPS6339554B2 - - Google Patents

Info

Publication number
JPS6339554B2
JPS6339554B2 JP58212440A JP21244083A JPS6339554B2 JP S6339554 B2 JPS6339554 B2 JP S6339554B2 JP 58212440 A JP58212440 A JP 58212440A JP 21244083 A JP21244083 A JP 21244083A JP S6339554 B2 JPS6339554 B2 JP S6339554B2
Authority
JP
Japan
Prior art keywords
layer
layers
semiconductor thin
single crystal
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58212440A
Other languages
Japanese (ja)
Other versions
JPS60108395A (en
Inventor
Toshimasa Ishida
Nagayasu Yamagishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP21244083A priority Critical patent/JPS60108395A/en
Publication of JPS60108395A publication Critical patent/JPS60108395A/en
Publication of JPS6339554B2 publication Critical patent/JPS6339554B2/ja
Granted legal-status Critical Current

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B13/00Single-crystal growth by zone-melting; Refining by zone-melting
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/60Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape characterised by shape

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)

Description

【発明の詳細な説明】 (発明の技術分野) 本発明は絶縁性下地層上に単結晶層を形成する
ための単結晶層製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION (Technical Field of the Invention) The present invention relates to a method for manufacturing a single crystal layer for forming a single crystal layer on an insulating underlayer.

(従来技術の説明) 半導体集積回路技術の急速な発展に伴い、大面
積の基板上に大規模集積回路を形成しようとした
り、又、三次元回路を形成しようとする試みが成
されている。そのためには、絶縁層上に単結晶の
半導体薄膜を形成することが望まれており、この
いわゆるSOI(Semiconductor on Insulator)技
術が上手に行えれば、半導体能動層を多層に積層
することが可能となり又、三次元ICの実現も可
能となる。
(Description of Prior Art) With the rapid development of semiconductor integrated circuit technology, attempts have been made to form large-scale integrated circuits on large-area substrates and to form three-dimensional circuits. To this end, it is desirable to form a single-crystal semiconductor thin film on an insulating layer, and if this so-called SOI (Semiconductor on Insulator) technology is skillfully performed, it will be possible to stack multiple semiconductor active layers. This also makes it possible to realize a three-dimensional IC.

第1図は従来における、下地層としての絶縁性
基板上にゲルマニウム(Ge)単結晶薄膜を形成
する方法を説明するための線図である。この従来
方法によれば、絶縁性基板1上にGeの薄層を任
意好適な堆積法で成長させる。この成長された
Ge層はアモルフアス又は多結晶体となつている。
従つて、このGe層に線状の光ビーム又は電子ビ
ーム等の放射ビームを照射して走査を行つて、被
照射部分を順次に溶融させて二次元的なゾーンメ
ルテイングを行い、Ge層の単結晶化を図つてい
る。しかしながら、この場合、基板1の上側表面
全体にGeの薄層を形成し、この層の単結晶化を
行うことは困難である。このため、通常は第1図
に示すように、基板1上にGe層2を複数個の帯
状又は島状領域に分けて形成する。そして、例え
ば、帯状Ge層領域の場合にはその帯状領域の長
手方向に対し垂直な方向に広がりを有する直線状
放射ビームを照射すると共に、この直線状放射ビ
ームを帯状領域の長手方向に順次に走査すること
によつてゾーンメルテイングを行つている。
FIG. 1 is a diagram for explaining a conventional method of forming a germanium (Ge) single crystal thin film on an insulating substrate as a base layer. According to this conventional method, a thin layer of Ge is grown on an insulating substrate 1 by any suitable deposition method. This grew
The Ge layer is amorphous or polycrystalline.
Therefore, this Ge layer is irradiated with a radiation beam such as a linear light beam or an electron beam and scanned to sequentially melt the irradiated portions to perform two-dimensional zone melting. Efforts are being made to make it into a single crystal. However, in this case, it is difficult to form a thin layer of Ge over the entire upper surface of the substrate 1 and to monocrystallize this layer. For this reason, as shown in FIG. 1, the Ge layer 2 is usually formed on the substrate 1 in a plurality of band-like or island-like regions. For example, in the case of a band-shaped Ge layer region, a linear radiation beam that spreads in a direction perpendicular to the longitudinal direction of the band-shaped region is irradiated, and this linear radiation beam is sequentially applied in the longitudinal direction of the band-shaped region. Zone melting is performed by scanning.

しかしながら、この従来方法によれば、放射ビ
ームの照射を受けたGe層内部での温度分布は、
隣り合う帯状領域間の間隙部分では放射の吸収が
ないため、この領域のGe層の中央部分で高温と
なり、かつ、領域の周辺部分で低温となり、これ
がため、結晶化のための核生成が帯状Ge層の周
辺より行われ順次中央部分に進行するが、中央部
分での単結晶がうまくつながらず、従つて均一な
単結晶が得られないという欠点があつた。
However, according to this conventional method, the temperature distribution inside the Ge layer irradiated with the radiation beam is
Since there is no absorption of radiation in the gap between adjacent band-shaped regions, the central part of the Ge layer in this region becomes high temperature, and the peripheral part of the region becomes low temperature, which causes nucleation for crystallization to occur in the band-shaped region. The process starts from the periphery of the Ge layer and then progresses to the center, but the disadvantage is that the single crystals in the center do not connect well and therefore a uniform single crystal cannot be obtained.

(発明の目的) 本発明の目的は絶縁性下地層上に均一で高品質
の単結晶半導体薄層を形成するための単結晶製造
方法を提供することにある。
(Object of the Invention) An object of the present invention is to provide a single crystal manufacturing method for forming a uniform, high quality single crystal semiconductor thin layer on an insulating underlayer.

(発明の構成) この目的の達成を図るため、本発明の単結晶層
製造方法によれば、光又は電子ビーム等の放射ビ
ームを照射して半導体薄層をアニーリングする前
の半導体薄層の形成方法に改良を加えたものであ
つて、先ず、絶縁性下地層上に熱伝導率の大きい
材料から成る第一層を設け、次に、この第一層上
に熱伝導率の小さい材料から成る複数個の第二層
を互いに離間して設け、続いて、これら互いに隣
接する第二層間に存在する溝を中心としてこれら
第二層上の一部分にわたり延在すると共に、この
溝を通じて前述の第一層と接触する複数個の半導
体薄層を互いに離間して設け、その後にこれら半
導体薄層に対し二次元的なゾーンメルテイングを
行つてこれら半導体薄層を単結晶化することを特
徴とする。
(Structure of the Invention) In order to achieve this object, according to the method for manufacturing a single crystal layer of the present invention, a semiconductor thin layer is formed before annealing the semiconductor thin layer by irradiating the semiconductor thin layer with a radiation beam such as a light or an electron beam. This is an improved method in which a first layer made of a material with high thermal conductivity is provided on an insulating base layer, and then a first layer made of a material with low thermal conductivity is placed on this first layer. A plurality of second layers are provided spaced apart from each other, and then the grooves between the adjacent second layers extend over a portion of the second layers, and through the grooves the aforementioned first layer is formed. The method is characterized in that a plurality of thin semiconductor layers in contact with the semiconductor layer are provided at a distance from each other, and then two-dimensional zone melting is performed on these thin semiconductor layers to form a single crystal.

(実施例の説明) 以下、図面により本発明の実施例につき説明す
る。
(Description of Examples) Examples of the present invention will be described below with reference to the drawings.

第2図A〜Eは本発明による単結晶層製造方法
を説明するための、主要工程段階での形成状態を
部分的断面図として示す工程図である。尚、これ
ら図は本発明の構成が理解出来る程度に概略的に
示してあるにすぎない。
FIGS. 2A to 2E are process diagrams showing the formation state at the main process steps as partial cross-sectional views for explaining the method for manufacturing a single crystal layer according to the present invention. Note that these figures are merely shown schematically to the extent that the configuration of the present invention can be understood.

先ず、第2図Aに示すように、絶縁性下地層1
1を用意する。この下地層として石英等の絶縁性
基板自体を用いても良いし、或いは、任意のタイ
プの半導体基板上に直接又は他の層を介して間接
的に積層させた絶縁層を用いても良い。この実施
例ではこの層11を絶縁性基板として説明する。
First, as shown in FIG. 2A, an insulating base layer 1 is formed.
Prepare 1. As this base layer, an insulating substrate such as quartz itself may be used, or an insulating layer stacked directly or indirectly on any type of semiconductor substrate may be used. In this embodiment, this layer 11 will be described as an insulating substrate.

次に、第2図Bに示すように、この基板11上
に、その全面にわたり、熱伝導率が大きくすなわ
ち熱伝導性が高く、かつ、高融点の材料(物質)
(例えば、W、Ta等の高融点の金属が適している
が、BN、AlN等の熱伝導性の高い絶縁物でも良
い)から成る第一層12を形成する。
Next, as shown in FIG. 2B, a material (substance) having a high thermal conductivity, that is, a high thermal conductivity and a high melting point is applied over the entire surface of the substrate 11.
(For example, a metal with a high melting point such as W or Ta is suitable, but an insulator with high thermal conductivity such as BN or AlN may also be used.) A first layer 12 is formed.

続いて、この第一層12上には、第2図Cに示
すように、熱伝導率の小さいすなわち熱伝導性の
低い材料(物質)、例えば、SiO2等から成る第二
層13をパターン形成する。この場合、この第二
層13を一旦第一層12の全面上に形成した後、
フオトリソグラフイ、フオトマスキング等の技術
を用いて図示の断面と直交する方向に延在する複
数本の微細溝14を、好ましくはその延在方向と
直交する幅方向に等ピツチ間隔で、形成してこの
第二層13を複数個の帯状領域に分離する。
Next, on this first layer 12, as shown in FIG . Form. In this case, after this second layer 13 is once formed on the entire surface of the first layer 12,
Using a technique such as photolithography or photomasking, a plurality of fine grooves 14 extending in a direction perpendicular to the illustrated cross section are formed, preferably at equal pitches in the width direction perpendicular to the extending direction. The second layer 13 of the lever is separated into a plurality of strip-like regions.

続いて、この帯状の第二層13が形成された基
板11上に複数個の帯状の半導体薄層15を、好
ましくは幅方向に等ピツチで、互いに分離して、
かつ、微細溝14に沿う長手方向に延在させて形
成する。この場合、第2図Dに示すように、これ
ら半導体薄層15を、互いに隣接する第二層13
の間の微細溝14を中心とし、かつ、これら両第
二層13上の一部分にわたり延在するように設け
る。従つて、この溝14は各第二層13の幅方向
の中央部に位置することとなる。そして、この場
合、この微細溝14を埋めた半導体薄層15によ
つて下側の熱伝導率の大きな第二層12と接触す
るようにする。
Subsequently, a plurality of strip-shaped semiconductor thin layers 15 are separated from each other, preferably at equal pitches in the width direction, on the substrate 11 on which the strip-shaped second layer 13 is formed.
Moreover, it is formed to extend in the longitudinal direction along the fine groove 14. In this case, as shown in FIG.
It is provided so as to be centered on the fine groove 14 between them and to extend over a portion of both of the second layers 13. Therefore, this groove 14 is located at the center of each second layer 13 in the width direction. In this case, the semiconductor thin layer 15 filling the fine grooves 14 is brought into contact with the lower second layer 12 having a high thermal conductivity.

次に、第2図Eに示すように、半導体薄層15
が形成されたままの状態で、或いは、所要に応じ
て、この半導体薄層15を含む基板11の上側全
面に、例えば、絶縁材料から成る保護層16を設
けた後、光又は電子のような放射ビーム17で、
この半導体薄層15のアニールを行う。この放射
ビーム照射は、半導体薄層15の幅方向に広がり
を有する線状ビーム17で、これら帯状半導体薄
層15の長手方向に走査して行うのが好適であ
る。この場合、このビーム走査は個々の帯状の半
導体薄層15毎に行つても良いし、数個まとめて
或いは一括して行つても良い。
Next, as shown in FIG. 2E, the semiconductor thin layer 15
As is, or after providing a protective layer 16 made of an insulating material over the entire upper surface of the substrate 11 including the semiconductor thin layer 15, it may be exposed to light or electronic radiation. With radiation beam 17,
This semiconductor thin layer 15 is annealed. This radiation beam irradiation is preferably performed by scanning the strip-shaped semiconductor thin layers 15 in the longitudinal direction with a linear beam 17 that extends in the width direction of the semiconductor thin layers 15. In this case, this beam scanning may be performed for each individual band-shaped semiconductor thin layer 15, or may be performed for several strips or all at once.

このように、放射ビーム17によつて半導体薄
層15の二次元的ゾーンメルテイングを行う。こ
の場合、仮りに、この半導体薄層15が下側の第
一層12と接触していなければ、放射ビーム照射
を受けて溶融した半導体薄層15の部分の温度分
布はこの溶融部分の中央部分で高くその幅方向の
周辺部では低くなる。しかしながら、本発明の場
合には、この半導体薄層15の中央部分18が微
細溝14を通じて下側の熱伝導率の大きい第一層
12と直接接触し、他の残りの部分は熱伝導率の
小さい第二層13と直接接触するように構成して
いるので、ゾーンメルテイング法による半導体薄
層15の溶融部分の中央部分18の熱は第一層1
2を経て急速に逸散してしまい、その結果、温度
分布はこの中央部分18の温度が他の残りの溶融
部分の温度よりも低くなり、幅方向に周辺部に向
つて順次高温となる。このため、放射ビーム照射
の終つた溶融部分は次第に冷却し温度の最も低い
中央部分18から固化してこの部分18に単結晶
の核が生じ、さらに、順次幅方向の周辺部に向け
て固化が進み、単結晶化する。このようにして帯
状の半導体薄層15の領域全体の単結晶化を図る
ことが出来る。
In this way, a two-dimensional zone melting of the thin semiconductor layer 15 is effected by the radiation beam 17. In this case, if this semiconductor thin layer 15 is not in contact with the lower first layer 12, the temperature distribution of the portion of the semiconductor thin layer 15 that has been melted by radiation beam irradiation will be at the center of this melted portion. It is high in the area and low in the peripheral area in the width direction. However, in the case of the present invention, the central portion 18 of this thin semiconductor layer 15 is in direct contact with the lower first layer 12 with high thermal conductivity through the fine groove 14, and the remaining portion is in direct contact with the first layer 12 with high thermal conductivity. Since it is configured to be in direct contact with the small second layer 13, the heat in the central portion 18 of the melted portion of the semiconductor thin layer 15 by the zone melting method is transferred to the first layer 1.
As a result, the temperature distribution is such that the temperature in the central portion 18 is lower than that in the remaining melted portions, and gradually increases in temperature toward the periphery in the width direction. Therefore, the molten part that has been irradiated with the radiation beam is gradually cooled and solidified starting from the central part 18 where the temperature is lowest, a single crystal nucleus is generated in this part 18, and the solidification is further continued in order toward the periphery in the width direction. Proceed to form a single crystal. In this way, the entire region of the band-shaped semiconductor thin layer 15 can be made into a single crystal.

尚、本発明は上述した実施例にのみ限定される
ものではないこと明らかである。
It is clear that the present invention is not limited only to the embodiments described above.

先ず、絶縁性下地層上に形成する各層の寸法、
形状、配置はもとより材料も所要に応じて選定し
得るものである。例えば、第一層は必らずしも基
板の全表面上に設ける必要がなく、単結晶層を形
成する個所の下側部分にのみ形成することが出来
る。また、第二層及び半導体薄層を帯状領域とし
たが、島状領域とすることも出来る。また、この
半導体薄層としてGeまたは他の任意好適な材料
を用いることが出来る。
First, the dimensions of each layer to be formed on the insulating base layer,
Not only the shape and arrangement but also the material can be selected as required. For example, the first layer does not necessarily have to be provided on the entire surface of the substrate, but can be formed only on the lower portion of the area where the single crystal layer is to be formed. Further, although the second layer and the semiconductor thin layer are formed into band-like regions, they can also be formed into island-like regions. Also, Ge or any other suitable material can be used as the semiconductor thin layer.

さらに、これら第二層及び半導体薄層の形成及
び第一層の形成は、通常の半導体技術を用いて形
成し得るものであり、第二層及び半導体薄層自体
の夫々の形成方法は特に問わない。
Furthermore, the formation of the second layer and the semiconductor thin layer and the formation of the first layer can be formed using ordinary semiconductor technology, and the methods for forming the second layer and the semiconductor thin layer themselves are not particularly important. do not have.

さらに、上述した本発明を、ICウエハ上に絶
縁層を形成した絶縁性下地層に適用すると、二層
以上の能動層を積層した三次元ICを実現するこ
とが可能となる。この場合、特に、熱伝導性の高
い第一層をW等のような導電性層とすることによ
り、この第一層によつてこの第一層の上下に設け
られた能動層間の電気的及び又は磁気的シールド
を容易に行ない得る。
Furthermore, if the present invention described above is applied to an insulating base layer formed on an IC wafer, it becomes possible to realize a three-dimensional IC in which two or more active layers are laminated. In this case, in particular, by using an electrically conductive layer such as W as the first layer having high thermal conductivity, this first layer enables electrical and electrical connections between the active layers provided above and below the first layer. Alternatively, magnetic shielding can be easily performed.

また、本発明の方法により形成した均一で高品
質の単結晶半導体薄層上にICを形成することが
出来るので、能動層を絶縁層を介して多数積層し
て三次元ICを製作することも出来る。
Furthermore, since an IC can be formed on a uniform, high-quality single-crystal semiconductor thin layer formed by the method of the present invention, it is also possible to fabricate a three-dimensional IC by laminating a large number of active layers with insulating layers in between. I can do it.

さらに、上述した層という語はいわゆる膜の意
味をも含むものと解するものとする。
Furthermore, the term "layer" mentioned above shall be understood to also include the meaning of a so-called film.

(発明の効果) 上述した実施例からも明らかなように、本発明
によれば、絶縁性下地層上に熱伝導率の大なる第
一層を設け、その上側に互いに溝で離間した複数
個の熱伝導率の小さい第二層を設け、さらに、こ
の溝を夫々中心として、この溝内はもとより隣接
する二つの第二層の上側部分に亘つて、半導体薄
層を互いに離間して複数個設け、その後にこの半
導体薄層に対し二次元的ゾーンメルテイング法を
実施してこの半導体薄層の単結晶化を行うのであ
るから、ゾーンメルテイングによつて溶融した半
導体薄層部分の温度分布を、この部分の幅方向に
おける中心部分の温度が最低となり、かつ、周辺
部分に向かうに従つて順次高温となるような分布
と容易かつ確実になし得る。これがため、本発明
によれば、溶融部分の中央部分から固化して単結
晶化が開始し、周辺部に向けて順々に単結晶化が
進んで最終的に半導体薄層全体の領域に亘つて完
全に単結晶化する。この場合、この単結晶化の進
む方向は、従来のように周辺部から中央部分に向
かつて互いに衝突し合う方向ではなく、中央部分
から周辺部分へと互いに離散する方向であるの
で、均一かつ高品質で大型の単結晶半導体薄層が
容易かつ確実に得られ、製造歩留まりも極めてよ
い。又、この単結晶半導体薄層の製造も従来の半
導体技術を用いて容易に行い得るので、製造コス
トも安価である。
(Effects of the Invention) As is clear from the embodiments described above, according to the present invention, a first layer having high thermal conductivity is provided on an insulating base layer, and a plurality of layers are formed on the upper side of the first layer, which are spaced apart from each other by grooves. A second layer having a low thermal conductivity is provided, and a plurality of thin semiconductor layers are formed at a distance from each other, centering on each groove, and extending not only within the groove but also over the upper portions of the two adjacent second layers. After that, a two-dimensional zone melting method is applied to this semiconductor thin layer to make it into a single crystal. Therefore, the temperature distribution of the semiconductor thin layer portion melted by zone melting is can be easily and reliably distributed such that the temperature in the center portion in the width direction of this portion is the lowest and gradually increases in temperature toward the peripheral portions. Therefore, according to the present invention, solidification and single crystallization start from the center of the molten part, and single crystallization progresses sequentially toward the periphery, eventually covering the entire area of the semiconductor thin layer. It completely becomes a single crystal. In this case, the direction in which this single crystallization progresses is not the direction in which they collide with each other from the periphery to the center as in the conventional case, but in the direction in which they become discrete from the center to the periphery, resulting in a uniform and high crystallization. A high-quality, large-sized single-crystal semiconductor thin layer can be easily and reliably obtained, and the manufacturing yield is also extremely high. Further, since this single crystal semiconductor thin layer can be easily manufactured using conventional semiconductor technology, the manufacturing cost is also low.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、絶縁性基板上に単結晶を形成する従
来方法を説明するための基板の一部分を断面とし
て示す斜視図、第2図A〜Eは本発明による単結
晶製造方法を説明するための主要製造段階での状
態を略図的断面図として示す製造工程図である。 11……絶縁性下地層、12……(熱伝導率の
大きい材料から成る)第一層、13……(熱伝導
率の小さい材料から成る)第二層、14……微細
溝、15……半導体薄層、16……保護層、17
……放射ビーム、18……溶融部分の中央部分。
FIG. 1 is a perspective view showing a part of the substrate as a cross section for explaining the conventional method of forming a single crystal on an insulating substrate, and FIGS. 2A to 2E are for explaining the method of manufacturing a single crystal according to the present invention. FIG. 3 is a manufacturing process diagram showing a state at a main manufacturing stage as a schematic cross-sectional view. 11... Insulating base layer, 12... First layer (made of a material with high thermal conductivity), 13... Second layer (made of a material with low thermal conductivity), 14... Fine groove, 15... ...Semiconductor thin layer, 16...Protective layer, 17
. . . Radiation beam, 18 . . . Central part of the melted part.

Claims (1)

【特許請求の範囲】 1 絶縁性下地層上に熱伝導率の大きい材料から
成る第一層を設け、 次に、該第一層上に熱伝導率の小さい材料から
成る複数個の第二層を互いに離間して設け、 続いて、互いに隣接する該第二層間の溝を中心
としてこれら第二層上の一部分にわたり延在する
と共に、該溝を通じて前記第一層と接触する複数
個の半導体薄層を互いに離間して設け、 その後に該半導体薄層に対し二次元的なゾーン
メルテイングを行つて該半導体薄層を単結晶化す
ること を特徴とする単結晶製造方法。
[Claims] 1. A first layer made of a material with high thermal conductivity is provided on an insulating base layer, and then a plurality of second layers made of a material with low thermal conductivity are provided on the first layer. are spaced apart from each other, and then a plurality of semiconductor thin layers extend over a portion of the second layers around the grooves between the adjacent second layers and contact the first layer through the grooves. 1. A method for producing a single crystal, comprising: providing layers separated from each other; and then performing two-dimensional zone melting on the thin semiconductor layer to form a single crystal.
JP21244083A 1983-11-14 1983-11-14 Preparation of single crystal Granted JPS60108395A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21244083A JPS60108395A (en) 1983-11-14 1983-11-14 Preparation of single crystal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21244083A JPS60108395A (en) 1983-11-14 1983-11-14 Preparation of single crystal

Publications (2)

Publication Number Publication Date
JPS60108395A JPS60108395A (en) 1985-06-13
JPS6339554B2 true JPS6339554B2 (en) 1988-08-05

Family

ID=16622639

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21244083A Granted JPS60108395A (en) 1983-11-14 1983-11-14 Preparation of single crystal

Country Status (1)

Country Link
JP (1) JPS60108395A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102458158A (en) * 2009-06-05 2012-05-16 Hf欧洲有限公司 Magnesium cell with improved electrolyte

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS541613A (en) * 1977-06-06 1979-01-08 Fuji Photo Film Co Ltd Electromagnetic radiation sensitive recording material

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS541613A (en) * 1977-06-06 1979-01-08 Fuji Photo Film Co Ltd Electromagnetic radiation sensitive recording material

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102458158A (en) * 2009-06-05 2012-05-16 Hf欧洲有限公司 Magnesium cell with improved electrolyte

Also Published As

Publication number Publication date
JPS60108395A (en) 1985-06-13

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