JPH01290219A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH01290219A JPH01290219A JP12110788A JP12110788A JPH01290219A JP H01290219 A JPH01290219 A JP H01290219A JP 12110788 A JP12110788 A JP 12110788A JP 12110788 A JP12110788 A JP 12110788A JP H01290219 A JPH01290219 A JP H01290219A
- Authority
- JP
- Japan
- Prior art keywords
- film
- polycrystalline
- insulator
- crystal
- stripe
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 11
- 238000004519 manufacturing process Methods 0.000 title claims description 7
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 24
- 239000000758 substrate Substances 0.000 claims abstract description 24
- 239000013078 crystal Substances 0.000 claims abstract description 19
- 239000012212 insulator Substances 0.000 claims abstract description 15
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims abstract description 12
- 238000000034 method Methods 0.000 claims abstract description 11
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 9
- 229910052710 silicon Inorganic materials 0.000 claims description 9
- 239000010703 silicon Substances 0.000 claims description 9
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 7
- 238000002844 melting Methods 0.000 claims description 6
- 230000008018 melting Effects 0.000 claims description 6
- 239000000463 material Substances 0.000 claims description 5
- 238000000151 deposition Methods 0.000 claims description 2
- 239000010410 layer Substances 0.000 abstract description 12
- 238000009826 distribution Methods 0.000 abstract description 9
- 238000002425 crystallisation Methods 0.000 abstract description 7
- 230000008025 crystallization Effects 0.000 abstract description 7
- 239000011229 interlayer Substances 0.000 abstract description 2
- 230000002093 peripheral effect Effects 0.000 abstract 1
- 238000005224 laser annealing Methods 0.000 description 8
- 238000010586 diagram Methods 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 2
- 238000001953 recrystallisation Methods 0.000 description 2
- 238000000137 annealing Methods 0.000 description 1
- 230000002902 bimodal effect Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 210000004709 eyebrow Anatomy 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Recrystallisation Techniques (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、非晶質絶縁体基板上に多結晶または非晶質シ
リコン膜を堆積したのち、レーザ光を走査してそのシリ
コン層を溶融、再結晶化して単結晶シリコン膜とし、半
導体素子を作成するSo!技術を用いる半導体装置の製
造方法に関する。[Detailed Description of the Invention] [Field of Industrial Application] The present invention involves depositing a polycrystalline or amorphous silicon film on an amorphous insulator substrate, and then melting the silicon layer by scanning a laser beam. , recrystallize to form a single-crystal silicon film and create a semiconductor device So! The present invention relates to a method of manufacturing a semiconductor device using technology.
Sol技術により単結晶シリコン層を形成する場合、レ
ーザ光の走査で溶融したシリコン層の中央部から結晶化
を開始させないと、良質の単結晶層が得られない、第2
図は、半導体素子を集積したシリコン基板上にSol技
術で単結晶シリコン膜を形成し、その単結晶シリコン膜
にも素子を作成して三次元ICを構成する場合の例を示
す、すなわち、シリコン基板1の上に酸化膜2を介して
多結晶シリコン膜3を積層し、平坦な表面を設けたのち
、さらに酸化膜4を積層し、その酸化膜に形成された溝
に多結晶シリコンを充填して多結晶シリコンストライプ
5を得る。この多結晶Stストライプ上を矢印6の方向
にレーザ光を走査すると、Siストライブからの熱は熱
伝導度の高い多結晶シリコンM3が存在する下方へ多く
放散され、熱伝導度の低い酸化膜4が接する側方への放
散が少ない、第3図はレーザ光走査直後の温度分布を示
し、Slストライプ5の幅の中央部が晟も温度が低く、
酸化膜4と接する部分が最も高くなっている。この状態
から冷却が進むと中央部が最初にStの溶融点Tに達し
結晶化が始まり、順次溶融点Tに達するストライプの側
方へ向けて結晶化が進み良質のSi単結晶ストライプが
得られる。When forming a single-crystal silicon layer using Sol technology, a high-quality single-crystal layer cannot be obtained unless crystallization starts from the center of the silicon layer melted by laser beam scanning.
The figure shows an example of forming a single crystal silicon film using Sol technology on a silicon substrate on which semiconductor elements are integrated, and forming elements on the single crystal silicon film to construct a three-dimensional IC. After a polycrystalline silicon film 3 is laminated on the substrate 1 via an oxide film 2 to provide a flat surface, an oxide film 4 is further laminated, and the grooves formed in the oxide film are filled with polycrystalline silicon. Then, polycrystalline silicon stripes 5 are obtained. When the laser beam is scanned over this polycrystalline St stripe in the direction of arrow 6, much of the heat from the Si stripe is dissipated downward, where polycrystalline silicon M3 with high thermal conductivity exists, and the oxide film with low thermal conductivity is dissipated. Figure 3 shows the temperature distribution immediately after laser beam scanning, and the central part of the width of the Sl stripe 5 has a low temperature even in the morning.
The portion in contact with the oxide film 4 is the highest. As cooling progresses from this state, the center reaches the melting point T of St first and crystallization begins, and crystallization progresses toward the sides of the stripe where the melting point T is reached in sequence, yielding a high-quality Si single crystal stripe. .
〔発明が解決しようとするLlla)
しかし、上述のような温度分布を得るためにSO■技術
のSl単結晶膜はストライプ構造をとらざるを得す、大
面積のSl単結晶膜を得ることができない、また、Si
ストライプ5からの下方への熱拡散のために一面に多結
晶Sl膜3が介在するため、St基板1に集積した素子
とSi単結晶ストライブに形成した素子とを接続する場
合、配線は多結晶St膜3を避けて通さなければならず
、高密度の眉間配線ができない、この問題は、St@結
晶ストライプを層間絶縁膜を介して多層に積み重ねる場
合にも同様に存在する。[Llla to be solved by the invention] However, in order to obtain the above-mentioned temperature distribution, the SO technology's Sl single crystal film has to have a striped structure, and it is difficult to obtain a large area Sl single crystal film. Not possible, also Si
Since the polycrystalline Sl film 3 is interposed on one surface for heat diffusion downward from the stripe 5, when connecting the elements integrated on the St substrate 1 and the element formed on the Si single crystal stripe, the wiring is This problem of having to avoid the crystal St film 3 and not being able to form high-density glabellar wiring also exists when St@crystal stripes are stacked in multiple layers via interlayer insulating films.
本発明の&IBは、上記の問題を解決し、−面に多結晶
St膜を介する必要のないIfjl縁体基機上にストラ
イプ状でない大面積の単結晶Si膜を形成するSol技
術を用いた半導体装置の製造方法を提供することにある
。&IB of the present invention solves the above problems and uses Sol technology to form a non-stripe, large-area single-crystal Si film on the Ifjl edge substrate without the need for a polycrystalline St film on the − plane. An object of the present invention is to provide a method for manufacturing a semiconductor device.
c!!Iaを解決するための手段〕
上記の課題の解決のために、本発明は、非晶質wA縁体
基板上に堆積した多結晶または非晶質シリコン膜をレー
ザ光の照射により溶融、再結晶化してなる単結晶シリコ
ン膜を用いた半導体装置の製造の際に、絶縁体基板の中
にその基板の絶縁体より熱伝導度の高い材料からなる所
定の幅と厚さを有する帯状層を所定の間隔を介して平行
に埋込み、その基板上に多結晶または非晶質シリコン膜
を一面に堆積し、隣接帯状層の中間直上で分割されたそ
のシリコン膜の各領域を、その領域の幅に等しい幅をも
つレーザ光を前記帯状層の長手方向に走査することによ
り順次溶融、再結晶させて全面を111結晶膜とするも
のとする。c! ! Means for Solving Ia] In order to solve the above problems, the present invention melts and recrystallizes a polycrystalline or amorphous silicon film deposited on an amorphous wA edge substrate by laser light irradiation. When manufacturing a semiconductor device using a single-crystalline silicon film made of silicon, a band-shaped layer with a predetermined width and thickness made of a material with higher thermal conductivity than the insulator of the substrate is placed in an insulator substrate. A polycrystalline or amorphous silicon film is deposited on the substrate in parallel with an interval of By scanning a laser beam having an equal width in the longitudinal direction of the band-shaped layer, the band-shaped layer is sequentially melted and recrystallized to form a 111 crystal film over the entire surface.
一度のレーザ光の走査により照射される多結晶または非
晶質St膜の領域の中央の直下には絶縁体より熱伝導度
の高い材料からなる帯状埋込み層があるため、5111
W域の両側の絶縁体のみの部分より温度が低下し、最初
に結晶化が始まって良質なSi単結晶ストライブができ
、同様の単結晶ストライプを間隔を明けないで形成でき
るため、大面積のSi単結晶膜を絶縁体上に得ることが
できる。また、このSl単結晶膜に作成される素子への
眉間配線は熱伝導度の高い帯状埋込み層の間隙を通じて
行うことができるので、高密度配線が可能である。Because there is a band-shaped buried layer made of a material with higher thermal conductivity than an insulator directly under the center of the region of the polycrystalline or amorphous St film that is irradiated by one laser beam scan, 5111
The temperature is lower than that of the insulator-only parts on both sides of the W region, and crystallization begins first to form high-quality Si single crystal stripes. Similar single crystal stripes can be formed without any gaps between them, resulting in a large area. It is possible to obtain a Si single crystal film on an insulator. Moreover, since the glabellar wiring to the element formed in this Sl single crystal film can be performed through the gap between the band-shaped buried layers having high thermal conductivity, high-density wiring is possible.
第1図は本発明の一実施例のレーザアニール工程を示し
、第2図と共通の部分には同一の符号が付されている。FIG. 1 shows a laser annealing process according to an embodiment of the present invention, and parts common to those in FIG. 2 are given the same reference numerals.
5liFi1の上には酸化M2が積層されているが、そ
の厚さ方向の中央に暢”rKさtの多結晶Siストライ
プ7が間隔りを介して埋込まれている。この酸化膜2の
上に全面に多結晶Sl膜8を成長させる。すなわち、第
2図の多結晶St膜3と多結晶Slストライプ5が入れ
換わった構造である。このS1膜8の多結晶S1ストラ
イプ7の直上の帯状領域を(W+D)の幅をもつレーザ
ビーム9で矢印6の方向に走査する。走査されたSi膜
8は、中央の直下に熱伝導度の高い多結晶SIストライ
プ7が存在するため、第4図にm41で示すような温度
分布を宵する。すなわち、第3図に示した多結晶Stス
トライブ部の温度分布に類領した温度分布が得られ、良
質のSl単結晶膜が形成される。An oxide M2 is laminated on the 5liFi1, and a polycrystalline Si stripe 7 with a smooth thickness is embedded at intervals in the center of the oxide film 2. A polycrystalline Sl film 8 is grown on the entire surface.That is, the structure is such that the polycrystalline St film 3 and the polycrystalline Sl stripe 5 shown in FIG. The strip-shaped region is scanned in the direction of the arrow 6 with a laser beam 9 having a width of (W+D).The scanned Si film 8 has a polycrystalline SI stripe 7 with high thermal conductivity just below the center. A temperature distribution as shown by m41 in Fig. 4 is obtained.In other words, a temperature distribution similar to the temperature distribution of the polycrystalline St strip portion shown in Fig. 3 is obtained, and a high-quality Sl single crystal film is formed. Ru.
次いで、隣接の未単結晶化の多結晶St膜8もレーザビ
ーム9で走査して単結晶化する。この操作をくり返せば
多結晶si*a全面を単結晶化できる。Next, the adjacent non-single-crystallized polycrystalline St film 8 is also scanned with the laser beam 9 to be made into a single crystal. By repeating this operation, the entire surface of polycrystalline si*a can be made into a single crystal.
第5図は本発明の別の実施例のレーザアニール工程を示
し、第1図と異なる点はレーザビーム9に双峰型の強度
分布を持つものを用いたことである。これによりレーザ
ビーム9の照射部分の中央部の温度は第4図の点線42
で示すようにさらに低くなり、レーザ照射部分の端から
の再結晶化を確実に抑制できる。シリコン基板lの上面
側にあるデバイス層11に形成されている半導体素子と
、単結晶化された多結晶S1膜8に形成される半導体素
子との配線は、酸化膜2の多結晶Siストライブ7の間
隙を通じて行うことができるため、高密度の眉間配線が
可能である。FIG. 5 shows a laser annealing process according to another embodiment of the present invention, which differs from FIG. 1 in that a laser beam 9 having a bimodal intensity distribution is used. As a result, the temperature at the center of the irradiated area of the laser beam 9 is indicated by the dotted line 42 in FIG.
As shown in , it becomes even lower, and recrystallization from the edge of the laser irradiated area can be reliably suppressed. Wiring between the semiconductor element formed in the device layer 11 on the upper surface side of the silicon substrate l and the semiconductor element formed in the single-crystalline polycrystalline S1 film 8 is performed using the polycrystalline Si stripes of the oxide film 2. Since it can be performed through a gap of 7, high-density wiring between the eyebrows is possible.
第6図t8)〜(目は、第1図、第5図に示した本発明
の実施例のレーザ光を走査する前の工程を順に示す、先
ず、シリコン基板1の上に屡さ約4μの酸化111I2
1を堆積する (図aLシリコン基板1の表面デバイス
層に素子が形成されているときでもその凹凸は1−程度
であり、酸化膜21の表面を平坦化して厚さ2〜3−に
する0次いで酸化膜21の上にリソグラフィ過程により
レジスト膜10をストライプ状に残しく図b)、酸化膜
21をエツチングして凹部23を形成する (図c)、
そしてレジスト膜lOを除去しく図d)、凹凸のある酸
化膜21上に厚さ約1μの多結晶Si膜70を堆積する
(図e)、この5ill170の上にレジスト膜10
を塗布する (図f)、この段階でレジストWj410
の表面は平坦になる。このあと、レジスト膜IOと多結
晶Si膜70に対して等しいエツチング速度をもつエツ
チングガスまたはエツチング液を用いてエッチバックを
行うことにより、多結晶si膜の表面を酸化WjI21
の表面と同一面とし、多結晶Stストライプ7を形成す
る (図g)、最後に0.5−以下の厚さの酸化膜22
および0.5−以下の厚さの多結晶シリコン膜8を堆積
する (図h)、酸化膜22は酸化膜21と共に第1図
、第5図の酸化膜2を形成する。Figure 6 t8) - (The diagrams sequentially show the steps before scanning with the laser beam of the embodiment of the present invention shown in Figures 1 and 5. First, approximately 4 μm of water is deposited on the silicon substrate 1. Oxidation of 111I2
(Fig. a) Even when elements are formed on the surface device layer of the silicon substrate 1, the unevenness is about 1-1, and the surface of the oxide film 21 is flattened to a thickness of 2 to 3-3. Next, the resist film 10 is left in a stripe pattern on the oxide film 21 by a lithography process (Figure b), and the oxide film 21 is etched to form a recess 23 (Figure c).
Then, the resist film 10 is removed (Fig. d), and a polycrystalline Si film 70 with a thickness of approximately 1 μm is deposited on the uneven oxide film 21 (Fig. e).
(Figure f), at this stage resist Wj410
the surface becomes flat. Thereafter, the surface of the polycrystalline Si film is oxidized by etching back the resist film IO and the polycrystalline Si film 70 using an etching gas or etching solution that has the same etching rate.
The polycrystalline St stripe 7 is formed on the same surface as the surface of the polycrystalline St stripe 7 (Figure g), and finally the oxide film 22 with a thickness of 0.5- or less
Then, a polycrystalline silicon film 8 having a thickness of 0.5- or less is deposited (FIG. h), and the oxide film 22 forms the oxide film 2 of FIGS. 1 and 5 together with the oxide film 21.
以上の実施例では、単結晶シリコン膜は多結晶シリコン
膜のレーザ光照射による溶融、再結晶化で形成したが、
非晶質シリコン膜からでも同様に形成することができる
。また、再結晶を照射レーザビームの中央部の直下から
起こさせるための多結晶シリコンストライプ7の代わり
に:酸化膜より熱伝導度の高い他の材料からなるストラ
イプを用いてもよい。In the above embodiments, the single crystal silicon film was formed by melting and recrystallizing the polycrystalline silicon film by laser beam irradiation.
It can be similarly formed from an amorphous silicon film. Moreover, instead of the polycrystalline silicon stripe 7 for causing recrystallization to occur directly under the center of the irradiated laser beam, a stripe made of another material having higher thermal conductivity than the oxide film may be used.
本発明によれば、非晶f絶縁体基板上の多結晶あるいは
非晶質シリコンのような非単結晶シリコンの膜をレーザ
アニールにより単結晶膜とする際、レーザの照射部の中
央が周縁部に比して低温になるようにして中央部から単
結晶化を開始させ、良質の単結晶シリコン膜を得るため
に、絶縁体基板のレーザビームの中央部直下に絶縁体よ
り熱伝導度の高い材料からなる膜、例えば多結晶シリコ
ンストライプを埋め込むことにより、従来のようにレー
ザ光照射時に非単結晶膜側方への熱放散を少なくするた
めに非単結晶膜を絶縁体基板表面層にストライプ状に埋
める必要がなくなった。この結果、絶縁体基板上に全面
に堆積した非単結晶シリコン膜の単結晶化が可能になり
、また単結晶シリコン膜中に形成される素子との絶縁体
基板を通しての高密度の眉間配線が絶縁体中の多結晶シ
リコンストライプなどの間隙を利用して行うことができ
るため、Sol技術を用いての高機能の半導体装置の製
造が可能となった。According to the present invention, when a non-monocrystalline silicon film such as polycrystalline or amorphous silicon on an amorphous insulator substrate is made into a single-crystalline film by laser annealing, the center of the laser irradiation area is In order to obtain a high-quality single-crystal silicon film by starting single crystallization from the center at a lower temperature than By embedding a film made of a material such as polycrystalline silicon stripes, a non-single-crystalline film is striped on the surface layer of an insulating substrate in order to reduce heat dissipation to the side of the non-single-crystalline film during laser beam irradiation as in the conventional method. It is no longer necessary to fill in the form. As a result, it becomes possible to single-crystallize a non-single-crystal silicon film deposited over the entire surface of an insulating substrate, and also to enable high-density glabella wiring between elements formed in the single-crystal silicon film through the insulating substrate. Since this can be carried out using gaps such as polycrystalline silicon stripes in an insulator, it has become possible to manufacture highly functional semiconductor devices using Sol technology.
第1図は本発明の一実施例の多結晶S1のレーザアニー
ル工程を示す斜視図、第2図は従来の多結晶Stのレー
ザアニール工程を示す斜視図、第3図は第2図のレーザ
アニール時の基板面上での温度分布図、第4図は本発明
の実施例のレーザアニール時の基板面上での温度分布図
、第5図は本発明の異なる実施例のレーザアニール工程
を示す斜視図、第6図(a)〜(目は第1図および第5
図に示した本発明の実施例のレーザアニール以前の工程
を順次示す断面図である。
1:シリコン基板、2.21.22!酸化膜、7:多結
晶Slストライプ、8:多結晶シリコン膜、第4図
第5図
第6図FIG. 1 is a perspective view showing a laser annealing process for polycrystalline S1 according to an embodiment of the present invention, FIG. 2 is a perspective view showing a conventional laser annealing process for polycrystalline St, and FIG. Figure 4 is a temperature distribution diagram on the substrate surface during annealing. Figure 4 is a temperature distribution diagram on the substrate surface during laser annealing in an embodiment of the present invention. Figure 5 is a diagram showing the laser annealing process in a different embodiment of the present invention. Perspective views shown in Figs. 6(a) to 6(a) (eyes are shown in Figs.
FIG. 3 is a cross-sectional view sequentially illustrating steps before laser annealing in the embodiment of the present invention shown in the figures. 1: Silicon substrate, 2.21.22! Oxide film, 7: Polycrystalline Sl stripe, 8: Polycrystalline silicon film, Fig. 4, Fig. 5, Fig. 6
Claims (1)
シリコン膜をレーザ光の照射により溶融、再結晶化して
なる単結晶シリコン膜を用いた半導体装置の製造の際に
、絶縁体基板の中に該基板の絶縁体より熱伝導度の高い
材料からなる所定の幅と厚さを有する帯状層を所定の間
隔を介して平行に埋込み、該基板上に多結晶または非晶
質シリコン膜を一面に堆積し、隣接する前記帯状層の中
間直上で分割された該シリコン膜の各領域を、該領域の
幅に等しい幅を持つレーザ光を前記書状層の長手方向に
走査することにより順次溶融、再結晶させ、全面を単結
晶膜とすることを特徴とする半導体装置の製造方法。1) When manufacturing a semiconductor device using a single crystal silicon film formed by melting and recrystallizing a polycrystalline or amorphous silicon film deposited on an amorphous insulator substrate by laser light irradiation, the insulator A band-shaped layer having a predetermined width and thickness made of a material having higher thermal conductivity than the insulator of the substrate is buried in parallel at a predetermined interval in the substrate, and polycrystalline or amorphous silicon is placed on the substrate. By depositing a film over one surface, and scanning each region of the silicon film divided just above the middle of the adjacent strip layer with a laser beam having a width equal to the width of the region in the longitudinal direction of the letter layer. A method for manufacturing a semiconductor device, characterized by sequentially melting and recrystallizing to form a single crystal film over the entire surface.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12110788A JPH01290219A (en) | 1988-05-18 | 1988-05-18 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12110788A JPH01290219A (en) | 1988-05-18 | 1988-05-18 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01290219A true JPH01290219A (en) | 1989-11-22 |
Family
ID=14803051
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12110788A Pending JPH01290219A (en) | 1988-05-18 | 1988-05-18 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01290219A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100531392B1 (en) * | 2002-06-05 | 2005-11-28 | 가부시키가이샤 히타치세이사쿠쇼 | Display device with active-matrix transistor and method for manufacturing the same |
-
1988
- 1988-05-18 JP JP12110788A patent/JPH01290219A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100531392B1 (en) * | 2002-06-05 | 2005-11-28 | 가부시키가이샤 히타치세이사쿠쇼 | Display device with active-matrix transistor and method for manufacturing the same |
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