JP2699325B2 - Method for manufacturing semiconductor device - Google Patents

Method for manufacturing semiconductor device

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Publication number
JP2699325B2
JP2699325B2 JP61182348A JP18234886A JP2699325B2 JP 2699325 B2 JP2699325 B2 JP 2699325B2 JP 61182348 A JP61182348 A JP 61182348A JP 18234886 A JP18234886 A JP 18234886A JP 2699325 B2 JP2699325 B2 JP 2699325B2
Authority
JP
Japan
Prior art keywords
layer
semiconductor
thin film
substrate
crystal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP61182348A
Other languages
Japanese (ja)
Other versions
JPS6338235A (en
Inventor
貴範 早藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
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Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP61182348A priority Critical patent/JP2699325B2/en
Publication of JPS6338235A publication Critical patent/JPS6338235A/en
Application granted granted Critical
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Expired - Lifetime legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H01L21/3226Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering of silicon on insulator

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体装置の製造方法における、特にゲッ
タリングに関する。 〔発明の概要〕 本発明は、SOI(絶縁層上に形成された半導体層)構
造を有する半導体装置の製造方法において、熱処理工程
の前にゲッタリングのためのダメージ層又は欠陥層を形
成しておくことにより、熱処理と同時に半導体単結晶薄
膜及びそこに形成された素子領域中の不純物の除去を行
うことができるようにしたものである。 〔従来の技術〕 Si結晶を基板として製造される現在の半導体装置の大
部分は、その特性を向上させ、また歩留りを上げるため
に、製造工程の途中(結晶加工工程も含む)においてゲ
ッタリング処理を施して不純物(及びこれにより生じる
欠陥)の除去を図っている。このゲッタリンクには、基
板の裏面にダメージ層を形成した後、熱処理を施すこと
により行う方法、また結晶内部に形成された欠陥層を利
用して行う方法があるが、現在は前者が主流となってい
る。 〔発明が解決しようとする問題点〕 上述したように現在行なわれているゲッタリングは、
SOI構造以外の半導体装置に対してであり、SOI構造に係
る半導体装置に対してのゲッタリング方法は未だ提案さ
れていない。 本発明は、上述の点に鑑みて、SOI構造に係る半導体
装置の製造工程におけるゲッタリング処理方法を提供す
るものである。 〔問題点を解決するための手段〕 本発明は、半導体基板上に絶縁層を介して形成した半
導体非単結晶薄膜を加熱溶融して再結晶化させて素子形
成領域を形成した後、素子形成領域中に半導体素子を形
成する半導体装置の製造方法であって、絶縁層の開口に
臨み素子形成領域に接する半導体基板の種部の幅を1〜
10μmにし、熱処理工程の前に半導体基板の裏面側にダ
メージ層又は欠陥層を形成し、熱処理工程時に種部を通
じて素子形成領域に対するゲッタリング処理を行う。欠
陥層は、基板内に形成することができる。 種部の幅が1μmより小さいと、結晶化されにくと共
にゲッリタングしにくくなり、10μmより大きいと絶縁
層の領域が小さくなり、SOI構造としての有効領域が得
にくくなる。 ダメージ層は、基板裏面へのリンのような不純物の拡
散又はイオン注入、レーザ又は電子線の照射、多結晶Si
の堆積、機械加工による歪層の形成等従来の方法を全て
使用して形成することができる。また、欠陥層によるゲ
ッタリングとは、結晶内部に形成された欠陥領域を利用
して行う、所謂イントリンシック・ゲッリリングであ
る。 ゲッタリングのためのダメージ層又は欠陥層は、熱処
理工程の前に形成しておけば、その後の熱処理を伴う工
程(例えば酸化膜形成工程、拡散工程等)においても同
時にゲッタリング処理も行われる。 〔作用〕 本発明によれば、SOI構造に係る半導体装置の構造に
おいて、絶縁層の開口に臨み素子形成領域に接する半導
体基板の種部の幅を1〜10μmにし、半導体基板の裏面
側にダメージ層又は欠陥層を形成するので、再結晶化さ
れ易く、且つSOI構造としての有効領域が十分得られ、
しかも熱処理工程の際に種部を通じて素子形成領域中の
不純物及びこれにより生じた結晶欠陥の除去が可能とな
る。 〔実施例〕 第1図は本発明の一実施例を示すものであり、同図に
示すように、単結晶Si基板(1)の一主面上に各種部
(2)となる領域を除いてSiO2層(3)が形成され、Si
O2層(3)上の多結晶Si薄膜(8)が加熱溶融されて種
部(2)より再結晶化し、SiO2層(3)及び種部(2)
上に単結晶Si薄膜(4)が形成され、この単結晶Si薄膜
(4)がSiO2層(3)の側壁部(5)によって分離され
て島領域即ち素子形成領域とされた構造の試料(6)す
なわち所謂SOI基板を使用した場合である。この単結晶S
i薄膜(4)の素子形成領域中に半導体素子が形成され
るものである。 なお、この試料(6)において、単結晶Si基板(1)
の厚さは約0.5mm、種部(2)の幅は1〜10μm程度、
単結晶Si薄膜(4)の厚さは約0.5μm、その幅は10μ
m〜1mm程度、SiO2層(3)の厚さは約0.5μmである。
種部(2)の幅が1μmより小さいと再結晶化に制約を
受けて結晶化されにくいと共に、ゲッタリングがしにく
くなり、10μmより大きくなると絶縁層(3)の領域が
小さくなりSOI構造としての有効領域が得にくくなる。 そして、この試料(6)の場合、先ず単結晶Si基板
(1)の時に裏面にダメージ層(7)を形成してゲッタ
リングのための熱処理を施す。このダメージ層(7)
は、不純物(例えばリン)の注入又は拡散、レーザ又は
電子線の照射、多結晶Siの堆積、機械加工による歪層の
形成等の方法で形成することができる。次にこの基板
(1)に対してLOCOS法で種部(2)となる領域を除い
てSiO2層(3)を形成した後、SiO2層(3)と種部
(2)上に多結晶Si薄膜(8)を形成する。次にこの基
板(1)の表面にレーザビーム、電子線等のエネルギー
ビームを照射して多結晶Siを溶融し、種部(2)から冷
却して単結晶Si薄膜(4)を形成する。この後、通常の
工程により、単結晶Si薄膜(4)中に半導体素子を形成
して、本実施例に係る半導体装置を得る。そして、上記
半導体素子形成工程における熱処理工程において、単結
晶Si薄膜(4)及び素子領域中の汚染不純物(例えばN
a、Ca等のアルカリ金属又はAu、Fe等の重金属)が種部
(2)より基板(1)を通して裏面のダメージ層(7)
に捕捉されてゲッリタングが行なわれる。この熱処理工
程とは、ゲッタリングだけを目的とした熱処理及び他の
処理を目的とした熱処理を含む。このゲッタリングは、
ダメージ層(7)から数mm離れた領域までその効果が及
ぶ。従って、単結晶Si薄膜(4)を形成するまでの工
程、またその後の半導体素子を形成するまでの工程にお
いて、種部(2)領域のみならず、単結晶Si薄膜(4)
の全領域に及んでダメージ層(7)への汚染不純物のゲ
ッタリング効果がある。本実施例のように、最初の単結
晶Si基板(1)の時点からダメージ層(7)を形成して
おく場合には、基板(1)の状態でまずゲッタリングさ
れるため、その後に形成される単結晶Si薄膜(4)の結
晶性が良好になる。 なお、不純物の除去に欠陥層を利用する場合には、基
板(1)中に形成しておくことができる。 また、絶縁層上に半導体素子が形成される単結晶Si薄
膜が多層に積層された構造の試料を使用する場合におい
ても、各層の単結晶Si薄膜が種部を介してダメージ層の
形成された基板につながっている場合には、上記実施例
と同様にゲッタリング効果が得られる。 次に第1図に示す構造の試料(6)を用いた場合の他
の実施例を説明する。本実施例の場合、単結晶Si基板
(1)に対してLOCOS法でSiO2層(3)を形成し、次に
多結晶Si薄膜(8)の形成及び溶融再結晶化して単結晶
Si薄膜(4)の形成を行った後、基板(1)の裏面に上
記実施例と同様にダメージ層(7)を形成する。この
後、単結晶Si薄膜(4)への半導体素子の形成を行っ
て、本実施例に係る半導体装置を製造する。そして、本
実施例の場合においても、ダメージ層(7)形成後の熱
処理工程において、ダメージ層(7)への汚染不純物の
ゲッタリングが行なわれて良好な半導体装置が得られ
る。なお、ダメージ層(7)の形成時点は、本実施例と
は異り、単結晶Si薄膜(4)形成直後以外の時点で形成
することも可能である。 〔発明の効果〕 本発明によれば、絶縁層上の半導体非単結晶薄膜を半
導体基板の一部の種部より再結晶化させてなるSOI構造
に係る半導体装置において、再結晶化が行なわれ、SOI
構造としての有効領域が十分得られると共に、種部を通
じてゲッタリングが良好に行われるため、高性能の半導
体装置が得られる。
The present invention relates to a method for manufacturing a semiconductor device, and particularly to gettering. SUMMARY OF THE INVENTION The present invention provides a method for manufacturing a semiconductor device having an SOI (semiconductor layer formed on an insulating layer) structure, wherein a damage layer or a defect layer for gettering is formed before a heat treatment step. By doing so, it is possible to remove impurities in the semiconductor single crystal thin film and the element region formed therein simultaneously with the heat treatment. [Prior art] Most of the current semiconductor devices manufactured using a Si crystal as a substrate have a gettering process during a manufacturing process (including a crystal processing process) in order to improve its characteristics and increase the yield. To remove impurities (and defects caused by the impurities). This getter link has a method of forming a damaged layer on the back surface of the substrate and then performing a heat treatment, or a method of using a defect layer formed inside the crystal, but the former is currently the mainstream. Has become. [Problems to be Solved by the Invention] As described above, the gettering currently performed is
A gettering method for a semiconductor device having an SOI structure other than the SOI structure has not yet been proposed. The present invention has been made in view of the above circumstances, and provides a gettering method in a manufacturing process of a semiconductor device having an SOI structure. [Means for Solving the Problems] The present invention provides a method for forming an element forming region by heating and melting a semiconductor non-single-crystal thin film formed on a semiconductor substrate via an insulating layer to recrystallize the element forming area. A method of manufacturing a semiconductor device in which a semiconductor element is formed in a region, wherein a width of a seed portion of a semiconductor substrate which faces an opening of an insulating layer and is in contact with an element forming region is 1 to 1.
A damage layer or a defect layer is formed on the back surface side of the semiconductor substrate before the heat treatment step, and a gettering process is performed on the element formation region through a seed portion during the heat treatment step. The defect layer can be formed in the substrate. If the width of the seed portion is less than 1 μm, it is difficult to crystallize and it is difficult to cause gelling. If the width of the seed portion is more than 10 μm, the area of the insulating layer becomes small, and it becomes difficult to obtain an effective area as an SOI structure. The damage layer is formed by diffusing or ion-implanting impurities such as phosphorus into the back surface of the substrate, irradiating a laser or an electron beam,
, And formation of a strained layer by machining, etc., can be used by all conventional methods. The gettering by the defect layer is a so-called intrinsic guelling performed using a defect region formed inside the crystal. If the damage layer or the defect layer for gettering is formed before the heat treatment step, the gettering processing is also performed simultaneously in a step involving a subsequent heat treatment (eg, an oxide film forming step, a diffusion step, and the like). [Operation] According to the present invention, in the structure of the semiconductor device according to the SOI structure, the width of the seed portion of the semiconductor substrate which faces the opening of the insulating layer and is in contact with the element formation region is set to 1 to 10 μm, and the rear surface of the semiconductor substrate is damaged. Since a layer or a defect layer is formed, it is easy to be recrystallized, and a sufficient effective region as an SOI structure is obtained,
In addition, during the heat treatment step, impurities in the element formation region and crystal defects caused by the impurities can be removed through the seed portion. Embodiment FIG. 1 shows an embodiment of the present invention. As shown in FIG. 1, regions other than various regions (2) on one main surface of a single crystal Si substrate (1) are removed. SiO 2 layer (3) is formed by
The polycrystalline Si thin film (8) on the O 2 layer (3) is heated and melted and recrystallized from the seed part (2), and the SiO 2 layer (3) and the seed part (2)
A sample having a structure in which a single-crystal Si thin film (4) is formed thereon, and the single-crystal Si thin film (4) is separated by side walls (5) of the SiO 2 layer (3) to form an island region, that is, an element formation region. (6) That is, a case where a so-called SOI substrate is used. This single crystal S
i A semiconductor element is formed in the element forming region of the thin film (4). In this sample (6), the single-crystal Si substrate (1)
Has a thickness of about 0.5 mm, the width of the seed part (2) is about 1 to 10 μm,
The thickness of the single crystal Si thin film (4) is about 0.5 μm and its width is 10 μm.
The thickness of the SiO 2 layer (3) is about 0.5 μm.
When the width of the seed portion (2) is smaller than 1 μm, recrystallization is restricted and crystallization is difficult, and gettering is difficult. When the width is larger than 10 μm, the region of the insulating layer (3) becomes small, resulting in an SOI structure. Effective area becomes difficult to obtain. In the case of the sample (6), a damage layer (7) is first formed on the back surface of the single crystal Si substrate (1), and a heat treatment for gettering is performed. This damaged layer (7)
Can be formed by a method such as injection or diffusion of an impurity (for example, phosphorus), irradiation of a laser or an electron beam, deposition of polycrystalline Si, formation of a strained layer by mechanical processing, or the like. Then after forming the SiO 2 layer and (3) except for the region as a seed unit with LOCOS method (2) relative to the substrate (1), SiO 2 layer (3) and seed section (2) on a multi A crystalline Si thin film (8) is formed. Next, the surface of the substrate (1) is irradiated with an energy beam such as a laser beam or an electron beam to melt the polycrystalline Si, and cooled from the seed part (2) to form a single-crystal Si thin film (4). Thereafter, a semiconductor element is formed in the single-crystal Si thin film (4) by a normal process to obtain a semiconductor device according to this embodiment. Then, in the heat treatment step in the semiconductor element forming step, a contaminant impurity (for example, N
a, an alkali metal such as Ca or a heavy metal such as Au or Fe) from the seed part (2) through the substrate (1) to the damaged layer on the back surface (7)
And guerrita tongue is performed. The heat treatment process includes a heat treatment for only gettering and a heat treatment for another treatment. This gettering
The effect extends to a region several mm away from the damage layer (7). Therefore, in the steps up to the formation of the single-crystal Si thin film (4) and the subsequent steps up to the formation of the semiconductor element, not only the seed part (2) region but also the single-crystal Si thin film (4)
Has an effect of gettering contaminant impurities to the damaged layer (7) over the entire area of the substrate. In the case where the damaged layer (7) is formed from the time of the first single-crystal Si substrate (1) as in this embodiment, gettering is first performed in the state of the substrate (1). The crystallinity of the resulting single-crystal Si thin film (4) is improved. When a defect layer is used for removing impurities, it can be formed in the substrate (1). Also, when using a sample having a structure in which a single crystal Si thin film in which a semiconductor element is formed on an insulating layer is stacked in multiple layers, the single crystal Si thin film of each layer has a damaged layer formed through a seed portion. When connected to the substrate, a gettering effect can be obtained as in the above embodiment. Next, another embodiment using the sample (6) having the structure shown in FIG. 1 will be described. In the case of this embodiment, an SiO 2 layer (3) is formed on the single crystal Si substrate (1) by the LOCOS method, and then a polycrystalline Si thin film (8) is formed and melted and recrystallized to form a single crystal.
After the formation of the Si thin film (4), a damaged layer (7) is formed on the back surface of the substrate (1) in the same manner as in the above embodiment. Thereafter, a semiconductor element is formed on the single-crystal Si thin film (4) to manufacture the semiconductor device according to the present embodiment. Also in the case of this embodiment, in the heat treatment step after the formation of the damaged layer (7), gettering of the contaminant impurities to the damaged layer (7) is performed, and a good semiconductor device is obtained. Note that, unlike the present embodiment, the damage layer (7) can be formed at a time other than immediately after the formation of the single crystal Si thin film (4). According to the present invention, recrystallization is performed in a semiconductor device having an SOI structure in which a semiconductor non-single-crystal thin film on an insulating layer is recrystallized from a part of a semiconductor substrate. , SOI
Since a sufficient effective area as a structure can be obtained and gettering is well performed through the seed portion, a high-performance semiconductor device can be obtained.

【図面の簡単な説明】 第1図は実施例の断面図である。 (1)は単結晶Si基板、(2)は種部、(3)はSiO
2層、(4)は単結晶Si薄膜、(7)はダメージ層、
(8)は多結晶Si薄膜である。
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a sectional view of an embodiment. (1) is a single crystal Si substrate, (2) is a seed part, (3) is SiO
2 layers, (4) single crystal Si thin film, (7) damage layer,
(8) is a polycrystalline Si thin film.

Claims (1)

(57)【特許請求の範囲】 1.半導体基板上に絶縁層を介して形成した半導体非単
結晶薄膜を加熱溶融して細結晶化させて素子形成領域を
形成した後、該素子形成領域中に半導体素子を形成する
半導体装置の製造方法であって、 前記絶縁層の開口に臨み前記素子形成領域に接する前記
半導体基板の種部の幅を1〜10μmにし、 熱処理工程の前に前記半導体基板の裏面側にダメージ層
又は欠陥層を形成し、 前記熱処理工程時に前記種部を通じて前記素子形成領域
に対するゲッタリング処理を行う ことを特徴とする半導体装置の製造方法。
(57) [Claims] A method of manufacturing a semiconductor device in which a semiconductor non-single-crystal thin film formed on a semiconductor substrate via an insulating layer is heated and melted to finely crystallize to form an element formation region, and then a semiconductor element is formed in the element formation region. A width of a seed portion of the semiconductor substrate facing the opening of the insulating layer and in contact with the element formation region is set to 1 to 10 μm, and a damage layer or a defect layer is formed on a back surface side of the semiconductor substrate before the heat treatment process. And performing a gettering process on the element formation region through the seed portion during the heat treatment process.
JP61182348A 1986-08-02 1986-08-02 Method for manufacturing semiconductor device Expired - Lifetime JP2699325B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61182348A JP2699325B2 (en) 1986-08-02 1986-08-02 Method for manufacturing semiconductor device

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Application Number Priority Date Filing Date Title
JP61182348A JP2699325B2 (en) 1986-08-02 1986-08-02 Method for manufacturing semiconductor device

Publications (2)

Publication Number Publication Date
JPS6338235A JPS6338235A (en) 1988-02-18
JP2699325B2 true JP2699325B2 (en) 1998-01-19

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JP4066574B2 (en) 1999-03-04 2008-03-26 富士電機デバイステクノロジー株式会社 Manufacturing method of semiconductor device
JP2000323484A (en) * 1999-05-07 2000-11-24 Mitsubishi Electric Corp Semiconductor device and semiconductor memory
JP2004172362A (en) * 2002-11-20 2004-06-17 Hyogo Prefecture Impurity removing method in semiconductor wafer, the semiconductor wafer, and semiconductor device

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JPS596057B2 (en) * 1979-10-11 1984-02-08 松下電器産業株式会社 Semiconductor substrate processing method
JPS6057672A (en) * 1983-09-08 1985-04-03 Seiko Epson Corp Semiconductor device
JPS6132433A (en) * 1984-07-25 1986-02-15 Hitachi Ltd Manufacture of semiconductor device
JPS61121468A (en) * 1984-11-19 1986-06-09 Matsushita Electric Ind Co Ltd Manufacture of semiconductor substrate
JPS61154121A (en) * 1984-12-27 1986-07-12 Fujitsu Ltd Manufacture of semiconductor device

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