JPS6337421B2 - - Google Patents

Info

Publication number
JPS6337421B2
JPS6337421B2 JP57114318A JP11431882A JPS6337421B2 JP S6337421 B2 JPS6337421 B2 JP S6337421B2 JP 57114318 A JP57114318 A JP 57114318A JP 11431882 A JP11431882 A JP 11431882A JP S6337421 B2 JPS6337421 B2 JP S6337421B2
Authority
JP
Japan
Prior art keywords
signal
divided
frequency
clock signal
signals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57114318A
Other languages
English (en)
Japanese (ja)
Other versions
JPS593677A (ja
Inventor
Kenichi Taki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kanadevia Corp
Original Assignee
Hitachi Shipbuilding and Engineering Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Shipbuilding and Engineering Co Ltd filed Critical Hitachi Shipbuilding and Engineering Co Ltd
Priority to JP57114318A priority Critical patent/JPS593677A/ja
Publication of JPS593677A publication Critical patent/JPS593677A/ja
Publication of JPS6337421B2 publication Critical patent/JPS6337421B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
JP57114318A 1982-06-30 1982-06-30 並列同期動作制御方法 Granted JPS593677A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57114318A JPS593677A (ja) 1982-06-30 1982-06-30 並列同期動作制御方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57114318A JPS593677A (ja) 1982-06-30 1982-06-30 並列同期動作制御方法

Publications (2)

Publication Number Publication Date
JPS593677A JPS593677A (ja) 1984-01-10
JPS6337421B2 true JPS6337421B2 (enrdf_load_stackoverflow) 1988-07-25

Family

ID=14634842

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57114318A Granted JPS593677A (ja) 1982-06-30 1982-06-30 並列同期動作制御方法

Country Status (1)

Country Link
JP (1) JPS593677A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0480709U (enrdf_load_stackoverflow) * 1990-11-22 1992-07-14

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3638947C2 (de) * 1986-11-14 1995-08-31 Bosch Gmbh Robert Verfahren zur Synchronisation von Rechnern eines Mehrrechnersystems und Mehrrechnersystem

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5815237U (ja) * 1981-07-16 1983-01-31 株式会社東芝 同期装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0480709U (enrdf_load_stackoverflow) * 1990-11-22 1992-07-14

Also Published As

Publication number Publication date
JPS593677A (ja) 1984-01-10

Similar Documents

Publication Publication Date Title
US4254492A (en) Redundant clock system utilizing nonsynchronous oscillators
US4703421A (en) Ready line synchronization circuit for use in a duplicated computer system
US4419629A (en) Automatic synchronous switch for a plurality of asynchronous oscillators
US6297702B1 (en) Phase lock loop system and method
JPH0659769A (ja) ディジタルコンピュータのクロック生成回路および方法
US3257546A (en) Computer check test
JPS6227813A (ja) 位相同期方式
GB1212213A (en) Improvements in or relating to clock synchronising circuits
US4857868A (en) Data driven clock generator
CA1113575A (en) Check circuit for synchronized clocks
JPS6337421B2 (enrdf_load_stackoverflow)
US3245048A (en) Computer clock phase lock
KR900000087B1 (ko) 병렬 동기 운전장치
JP2588290B2 (ja) データ入出力システム
JPS635787B2 (enrdf_load_stackoverflow)
EP0112599B1 (en) Pulse corrector
JP2653654B2 (ja) コンピュータシステムの暴走監視装置
SU790225A1 (ru) Устройство дл синхронизации импульсов
SU611286A1 (ru) Устройство фазовой автоподстройки частоты
JPH0630035B2 (ja) クロック同期型システムにおけるクロック切替え制御方式
KR960012470B1 (ko) 프로그램 가능한 타임아웃 타이머
SU1177879A1 (ru) Частотно-фазовый компаратор
SU1642473A1 (ru) Многоканальное устройство синхронизации
SU849187A1 (ru) Устройство дл формировани синхро-СигНАлОВ
JPS6260310A (ja) 同期信号発生方式