JPS6332303B2 - - Google Patents

Info

Publication number
JPS6332303B2
JPS6332303B2 JP55174604A JP17460480A JPS6332303B2 JP S6332303 B2 JPS6332303 B2 JP S6332303B2 JP 55174604 A JP55174604 A JP 55174604A JP 17460480 A JP17460480 A JP 17460480A JP S6332303 B2 JPS6332303 B2 JP S6332303B2
Authority
JP
Japan
Prior art keywords
circuit
state change
pulse
data
change detection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55174604A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5799062A (en
Inventor
Masahiro Fuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Facom Corp
Original Assignee
Fuji Facom Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Facom Corp filed Critical Fuji Facom Corp
Priority to JP55174604A priority Critical patent/JPS5799062A/ja
Publication of JPS5799062A publication Critical patent/JPS5799062A/ja
Publication of JPS6332303B2 publication Critical patent/JPS6332303B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Communication Control (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Dc Digital Transmission (AREA)
JP55174604A 1980-12-12 1980-12-12 Reception circuit for data transmission Granted JPS5799062A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55174604A JPS5799062A (en) 1980-12-12 1980-12-12 Reception circuit for data transmission

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55174604A JPS5799062A (en) 1980-12-12 1980-12-12 Reception circuit for data transmission

Publications (2)

Publication Number Publication Date
JPS5799062A JPS5799062A (en) 1982-06-19
JPS6332303B2 true JPS6332303B2 (no) 1988-06-29

Family

ID=15981475

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55174604A Granted JPS5799062A (en) 1980-12-12 1980-12-12 Reception circuit for data transmission

Country Status (1)

Country Link
JP (1) JPS5799062A (no)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6384706U (no) * 1986-11-20 1988-06-03
US9114025B2 (en) 1999-10-20 2015-08-25 Krt Investors, Inc. Methods and devices for spinal disc annulus reconstruction and repair

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5923661A (ja) * 1982-07-29 1984-02-07 Matsushita Electric Ind Co Ltd パルス通信回路
JP5053232B2 (ja) * 2008-10-31 2012-10-17 三菱電機株式会社 通信速度検出装置および通信装置
JP2010124268A (ja) 2008-11-20 2010-06-03 Sony Corp データ通信装置、および通信制御方法、並びにプログラム

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6384706U (no) * 1986-11-20 1988-06-03
US9114025B2 (en) 1999-10-20 2015-08-25 Krt Investors, Inc. Methods and devices for spinal disc annulus reconstruction and repair

Also Published As

Publication number Publication date
JPS5799062A (en) 1982-06-19

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