JPS63316514A - Turn-on locking circuit for transistor switching device - Google Patents

Abstract

PURPOSE:To shorten a dead time by discriminating that a reverse bias voltage between base emitters, namely, a negative voltage is established at the time of turning off one side transistor, and inputting an ON signal to other side transistor. CONSTITUTION:A comparator 21 compares the base emitter voltage of a main transistor Q1 and the voltage of a reference power source 31, the potential of the inverse of the input terminal of the comparator 21 is lower than the potential of a + input terminal, then, an output 21a is inverted from an 'L' to an 'H'. Simultaneously, the gate of a NAND gate AG12 is switched from 'closed' to 'opened', and a main transistor Q2 can be driven by an output signal 12a of a driving logic signal generating circuit 12. In the same way, a comparator 22 compares the base emitter voltage of the main transistor Q2 and the voltage of a reference power source 32, the potential of the inverse of the input terminal is lowered, then, the NAND gate is switched in the same way, and the main transistor Q1 can be driven by using an output signal 11a of a driving logic signal generating circuit 11.

Description

[Detailed description of the invention] [Industrial application field]

The present invention connects the main circuit of two sets of transistors in series, which are turned off by applying a reverse bias between the base and emitter, and connects them between DC power supplies, and when one set of transistors is turned on, the other set of transistors is turned off. The present invention relates to a transistor switching device that turns off a set of transistors, and in particular to a circuit that locks the turn-on of a transistor so as to always keep the dead time of the switching operation to a minimum while preventing arm short-circuiting of the transistor. Note that in the following figures, the same reference numerals indicate the same or corresponding parts. Also logic or level “old gh”, “Lo
w'' will be simply written as ``H'' and ``L''.

[Conventional technology]

FIG. 3 is an example of a single-phase inverter circuit using this type of transistor switching device. In the same figure, Ed
is a main DC power supply, Q1 to Q4 are main transistors that perform switching operations, and Z is an inverter load. In this circuit, main transistors Ql and Q4 are turned on and Q
2. Q3 off state and Ql, Q4 off state and Q2
．． The inverter operation is performed by alternately repeating the ON state of Q3 and applying the voltage of the main DC power source Ed to the load 2 while alternating the polarity. Here, for convenience, the series circuit of main transistors Q1 and Q2 or the series circuit of Q3 and Q4 is called an arm. When operating such a circuit, it is necessary to prevent the arm from shorting. For example, in an arm consisting of main transistors Q1 and Q2, when transitioning from the Q1 on and Q2 off states to the 01 off and 02 on states, it is necessary to ensure that Ql is After turning off, it is necessary to apply base current +IB as a turn-on signal to 02. Figure 4 fil, (21 shows the waveform of the base current supplied to the main transistors Ql and Q2, respectively, at the time of such switching change. In the figure (11, f21, before time t1, +IB
A base current of Q1 is supplied, and Ql is in an on state. Further, before time t4, no base current is supplied to the main transistor Q2, and Q2 is in an off state. Next, at time t1, in order to turn off the main transistor Q1, a reverse bias is applied between the base and emitter of Q1, and the base current of Q2 is first reversed to -IB, causing Q1 to rapidly turn off. However, the main transistor Q1 does not completely turn off until the time t2 or t3 when the charge accumulated at the base-emitter junction B of the main transistor Q1 is discharged. The time (tl-t2) or (tl-t3) required for this turn-off changes depending on the temperature of the junction of the main transistor Q1; when the junction temperature is low, the time is (tl-t2), and when the junction temperature is high, it is (tl-t2).
l, t3). Therefore, in order to turn on the main transistor Q2 next, the main transistor Q1 must be turned on at time t4, which includes sufficient margin time to ensure that it is in the off state no matter what the junction temperature.
, a base current +IB is given to the main transistor Q2. The point at which the polarity of the base current of one transistor in the same arm is reversed (the point at which turn-off starts)
The time TD from tl to the turn-on start time t4 of the other main transistor is called the de-node time.

[Problems to be solved by the invention]

However, for an inverter device, if the dead time TD is long, problems such as a decrease in efficiency, a decrease in torque (in the case of motor load), and an increase in harmonic current occur. An object of the present invention is to provide a turn-on lock means that determines that the base-emitter reverse bias voltage has been established when one transistor constituting the same arm is turned off, and provides a turn-on signal to the other transistor. The purpose is to minimize the above-mentioned problems by switching the main transistor in the minimum necessary dead time.

[Means to solve the problem]

In order to solve the above problems, the circuit of the present invention consists of two sets of transistors (main transistor
1, Q2, etc.) are connected in series between DC power supplies (main DC power supply Ed, etc.), and when one set of transistors is turned on, the other set of transistors is turned off. When the one set of transistors is turned off, it is determined that a reverse bias voltage (such as a negative VIII! voltage) is established between the base and emitter of the transistor, and an on signal is input to the other transistor. (Comparator 2. Reference power supply 3. NAND gate AG)
II, AG12, etc.).

[For use]

In the present invention, an arm in which two main transistors are connected in series is connected between the main DC power supply, each main transistor in the arm is alternately turned on and off, and the base of the main transistor is
In a switching circuit that turns off its main transistor by reverse biasing its emitters,
Focusing on the fact that when the main transistor is completely turned off, a sufficient reverse bias voltage is established between its base and emitter to turn off the main transistor.
This established reverse bias voltage is detected to provide a turn-on signal to the other main transistor in the arm in an attempt to minimize dead time.

【Example】

The present invention will be explained in detail below based on FIGS. 1 and 2. FIG. 1 is a circuit diagram showing the main part configuration as an embodiment of the present invention, and FIG. 2 is a waveform diagram for explaining the operation. Figure 1 shows the main transistors Ql and Q for 1 am.
2 drive circuit is shown. In the same figure, 1 (ICl
3) are each main transistor Ql. A drive logic signal generation circuit that generates a logic signal for driving Q2, 2 (21, 22) is a comparator, 3
(31, 32) are reference power supplies, 4 (4L42) are drive circuits that generate base currents to drive the main transistors Ql and Q2, respectively, and AGII and AG12 are NAN
D gate, Nl, and N2 are NOT elements. The comparator 21 compares the base-emitter voltage of the main transistor Q1 with the voltage of the reference power supply 31.
When the potential of the (-) input terminal of 1 is lower than the potential of the c+) input terminal, the output 21a is inverted from "L" to "H". At this time, the NAND gate AG12 switches its gate from the closed state to the open state, and the drive logic signal generation circuit 1
The main transistor Q2 can be driven by the second output signal 12a. Similarly, the comparator 22 compares the base-emitter voltage VBE of the main transistor Q2 with the voltage of the reference power supply 32, and when the potential of the (→input terminal) of the comparator 22 is lower than the potential of the [+] input terminal, its output 22a is inverted from "L" to "H". At this time, NAND gate AGII switches its gate from the closed state to the open state, allowing the main transistor Q1 to be driven by the output signal 11a of the drive logic signal generation circuit 11. On the other hand, in FIG. 2 (11 is the base-emitter voltage V when the main transistor Ql or Q2 is turned off)
(2) shows the transition of BH, and (2) also shows the transition of the base current B so that the times correspond to each other. As can be seen from the figure, when a turn-off signal is applied to the main transistor that is conducting at time t1, its base current increases by +I
B reverses to -IB and flows for a while, but eventually the base current of -IB disappears, and at time t2 or t3 when this main transistor is completely turned off, the drive circuit 4 sends a sufficient signal as the turn-off signal. A large negative V (reverse bias voltage) is established between its base and emitter. Therefore, in FIG. 1, it is assumed that the main transistor Q1 is off and the main transistor Q2 is on (therefore, the comparator output 21a is "H" and the output 22a is "L"), and at time t1 in FIG. The output signal 12a of the drive logic match generation circuit 12 starts turning off the main transistor Q2 via the drive circuit 42. That is, when Q2 is reverse biased and the output signal 11a of the drive logic signal generation circuit 11 is used as the ON signal for the main transistor Q1, the NAND gate AGll does not immediately become open, and this ON signal is used as the ON signal for the drive circuit. 41 cannot be given. Next, after time t2 or t3, the base-emitter voltage ■1 of transistor Q2 has been established to a sufficiently negative value,
That is, as soon as the transistor Q2 is completely turned off, the comparator output 22a switches from "L" to "H", the NAND gate AGII becomes open, and the main transistor Q1 can be turned on. In this way, it is possible to prevent short-circuiting of the arm made up of transistors Ql and Q2 with the necessary minimum dead time TD.

【Effect of the invention】

According to the present invention, the main circuit of two transistors Ql and Q2, which are turned off by applying a reverse bias between the base and emitter, are connected in series between the DC power supply Ed, and when one of the transistors is turned on, , in the transistor switching device that turns off the other transistor, when the one transistor is turned off, it is determined that a reverse bias voltage, that is, a negative 1 voltage, is established between the base and emitter of the transistor; Comparators 21 and 22 as turn-on lock means that enable input of an on signal to the other transistor, reference power supply 3L32, and NAND
Since we decided to include gates AGII and AG12,
The transistor switching device can be operated with the minimum necessary date time TD that matches the turn-off time of the transistor.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing the main part configuration as an embodiment of the present invention, FIG. 2 is a waveform diagram for explaining operation, and FIG. 3 is a circuit diagram showing an example of the main circuit configuration of a single-phase inverter. 4 are waveform diagrams showing examples of conventional transistor drive signals. Ed: Main DC power supply, Ql, Ql main transistor, Z: Inverter load, 1 (11, 12): Drive logic signal generation circuit, 2 (21, 22): Comparator, 3 (3
1゜32) Two single power supplies, 4 (41, 42): Drive circuit, AGlIAG12: NAND gate, VIIE: Base-emitter voltage, TD: Date time.

Claims (1)

[Claims] 1) A main circuit consisting of two sets of transistors that are turned off by applying a reverse bias between the base and emitter is connected in series between DC power supplies, and when one set of transistors is turned on, , in the transistor switching device that turns off the other set of transistors, when the one set of transistors is turned off, it is determined that a reverse bias voltage between the base and emitter of the transistors is established, and the transistor switching device turns off the other set of transistors. 1. A turn-on lock circuit for a transistor switching device, comprising a turn-on lock means for inputting an on signal to a transistor.