JPH0431828Y2 - - Google Patents

Description

[Detailed Description of the Invention] (Industrial Application Field) This invention relates to a control device for a bridge type transistor inverter.

(Prior Art) FIG. 2 shows one phase of a bridge type transistor inverter. A bridge type inverter supplies alternating current power to the load by turning transistors Q ₁ and Q ₂ on and off alternately, but in order to prevent transistors Q ₁ and Q ₂ from turning on at the same time and causing a power supply short circuit, a dead time period is set. It is set up. Figure 3 shows the transistor
The ON and OFF time charts for Q ₁ and Q ₂ are shown.
After the transistor _Q2 switches from ON to OFF, the base input is applied to the transistor _Q1 after a slight time delay t (dead time). Similarly, a dead time t is provided when switching from transistor Q ₁ to Q ₂ .

(Problem that the invention aims to solve) The method of solving power supply short circuits by setting dead time changes the switching characteristics of transistors due to variations in elements, fluctuations in load conditions, etc., and it takes a considerable amount of time to cover these conditions. It is necessary to take an extra period as a dead time, which causes an increase in waveform distortion.

(Means for solving the problem) This invention monitors the inverter output voltage on the load side, detects that the transistor has switched from ON to OFF when this voltage reaches the ground potential or power supply voltage, and detects that the transistor is switched from ON to OFF. It provides the base input to the other transistor, and in a bridge type transistor inverter, the base input of the transistor is
The feature is that ON/OFF switching is performed by actually determining the operating status of the inverter, eliminating the conventional dead time problem.

Figure 4 shows an enlarged view of the transition process of transistor _Q1 from ON to OFF. Collector emitter voltage
V _CE is zero V when it is conducting and increases as it shifts to OFF, but the inverter output voltage V ₁ is the DC power supply voltage E when it is conducting, and contrary to the V _CE voltage, it decreases with time. The load is usually a reactor load, and even if transistor Q ₁ has finished its transition to OFF and is completely shut off, the reactor energy will cause the collector-emitter voltage V _CE to rise above the supply voltage E, causing the inverter output The voltage V ₁ tends to drop below the ground potential of zero volts. By the way, in this bridge type inverter, diodes D ₁ and D ₂ for regeneration are normally connected in parallel with transistors Q ₁ and Q ₂ , and each voltage of V _CE and V ₁ is connected to the diodes D 1 and D ₂ for regeneration. Each is clamped by D ₂ to form the waveform shown.

Further, FIG. 5 shows the process of transitioning the transistor _Q2 from ON to OFF. transistor Q ₂
In this case, contrary to the transistor Q ₁ , the inverter output voltage V ₁ is zero V when conductive and increases as it turns OFF, resulting in a waveform similar to that of the transistor Q ₁ due to the inductance effect of the load and the diode clamping effect.

In other words, this inverter output voltage V ₁ is the trigger signal of the base input of transistor Q ₂ when switching transistor Q ₁ from ON to OFF and then turning transistor Q ₂ ON, or vice versa.
Switch Q ₂ from ON to OFF and then transistor Q ₁
They are used as trigger signals for the base input of the transistor Q1 when turning on the transistor _Q1 , and a specific example of the circuit will be explained below with reference to FIG.

In Figure 1, Q ₁ and Q ₂ are transistors, D ₁ ,
D ₂ is a parallel-connected diode, and E is a DC power supply and shows the main circuit for one phase. The control circuit includes Q ₁ , Q ₂ base drive circuits D _r1 , D _r2 , AND gates A ₁ , A ₂ ,
It consists of flip-flops F ₁ and F ₂ , an OR gate for starting, and comparators CP ₁ and CP ₂ . The base drive circuits D _r1 and D _r2 include AND gates A ₁ ,
The illustrated drive signal is applied via A ₂ and is the other signal of AND gates A ₁ and A ₂ . Transistors Q ₁ and Q ₂ are turned on according to the comparison result signal of the inverter output voltage with zero potential or power supply voltage.
Turn it off.

Next, the operation will be explained. Now transistor Q ₁
Suppose that it is ON and the base input switches from ON to OFF. Transistor _Q1 gradually increases collector-emitter voltage V _CE and inverter output voltage
V ₁ decreases, and as explained earlier, when the transistor Q ₁ is completely turned off, the V ₁ voltage becomes less than the ground potential and is clamped by the diode D ₂ . That is, this _V1 voltage and the ground potential are compared by the comparator _CP2 , and an output signal is generated from the comparator _CP2 to operate the flip-flop _F2 .
The base input signals of transistors Q ₁ and Q ₂ are in a symmetrical relationship, so if the Q ₁ signal is OFF, the Q ₂ signal is
The output of the flip-flop _F2 is inverted from "0" to "1" by the output of the comparator _CP2 , and an ON signal is applied to the transistor _Q2 from the AND gate _A2 . In this way, the inverter output voltage signal V ₁ of this phase detects when transistor Q ₁ is completely turned off and determines the start point of applying the base input of transistor Q ₂ .

Transistor Q ₂ is in the ON state and it is turned OFF
When transistor Q ₁ is turned on, the base input of transistor Q ₂ changes from ON to OFF.
After switching to , the collector-emitter voltage V _CE of transistor Q ₂ gradually increases and the inverter output voltage V ₁ also increases, and as explained earlier, when transistor Q ₂ is completely turned off, V ₁ voltage is higher than the power supply voltage, it detects that transistor Q ₂ is completely turned off, and provides a base input signal to transistor Q ₁ . In addition,
The series of operations from Q ₂ OFF to Q ₁ ON during this period is
Comparator CP ₁ , OR gate OR, flip-flop
This is done via F ₁ , AND gate A ₁ , and base drive circuit D _r1 , and Q ₁ to Q ₂ explained earlier
This is exactly the same as when switching to .

(Function) In a bridge-type transistor inverter, when switching the transistors ON and OFF, the inverter output voltage is monitored, and when the transistor is OFF, this voltage drops below ground potential or rises above the power supply voltage. Considering this (reactor load), this was used to trigger the base input signal of one of the upper and lower transistors to turn on the transistor.
After confirming that it is OFF during actual operation, the other transistor is turned ON.

(Effects of the invention) The dead time period, which causes inverter output waveform distortion, can be shortened to the shortest period necessary according to the actual circuit operation, and the dead time can be reduced to the maximum length that takes various conditions into account. There is no need to perform settings, etc., and a significant improvement in the inverter output waveform can be realized.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram of the embodiment, Fig. 2 is a bridge type transistor inverter one-phase circuit diagram, Fig. 3 is a conventional transistor base input waveform, and Fig. 4 is the transition from ON to OFF of transistor _Q1 . _VCE ,
V ₁ voltage waveform, Figure 5 is the same for transistor Q ₂
This is the _V1 voltage waveform when transitioning from ON to OFF. Q ₁ , Q ₂ ... Same phase upper and lower transistors, CP ₁ ,
CP ₂ ... comparator, F ₁ , F ₂ ... flip-flop,
A ₁ , A ₂ ...and gate, D _r1 , D _r2 ... base drive.

Claims (1)

[Scope of utility model registration request] In a bridge type transistor inverter,
The inverter output voltage is compared with the zero level potential, and when the inverter output voltage falls below the zero level potential, an output signal is generated and the base input signal of the lower transistor of the upper and lower transistors of the same phase is compared, and the inverter output voltage and power supply voltage are A bridge type transistor inverter is characterized in that when the inverter output voltage becomes equal to or higher than the power supply voltage by comparison with Control device.