JP3141925B2 - Bridge type inverter device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bridge type, a half bridge type or a polyphase inverter device.

[0002]

2. Description of the Related Art When a switch of a bridge type inverter for converting DC to AC is turned on / off, switching loss occurs. To solve this kind of problem, partial resonance is used to switch the switch to ZCS (Zero Current Switching) or ZVS.
(Zero voltage switching) has been proposed to reduce switching loss, surge voltage and noise. However, in the case of the system including the partial resonance switch, the circuit configuration becomes complicated.

An object of the present invention is to provide a bridge type inverter device capable of reducing switching loss with a simple circuit.

[0004]

The invention according to claim 1 for achieving the above object will be described with reference to the reference numerals in the drawings showing an embodiment. Alternatively, a plurality of switch circuits are connected, and the switch circuit applies a current in a first direction and a second
, A half-bridge type or a multi-phase bridge type inverter device, wherein at least one of the switch circuits comprises a series circuit of a first switch S1 and a first reactor L1. Wherein the first switch S1 is connected to the first reactor L
1 is located at one end of the power supply 1 and the first switch S1 and the first reactor L1 are connected to the power supply 1
And a series circuit of a second switch S2 and a second reactor L2 connected between one end of the load and one end of the load, wherein the second switch S2 is connected to the second switch S2. Of the power supply 1 with respect to the second reactor L2 and the second switch S
2 is connected between one end of the load and the other end of the power supply 1, and has a direction opposite to that of the first and second switches S1 and S2. First and second diodes D connected in parallel to the first and second circuits
1, D2, a first capacitor C1 having one end connected to one end of the power supply 1, a second capacitor C2 having one end connected to the other end of the power supply 1, and a first capacitor C1. And a third diode D3 connected between the other end of the first reactor L1 and the first switch S1 side terminal of the first reactor L1, and a second diode L3 of the second reactor L2.
A fourth diode D4 connected between the switch S2 side terminal and the other end of the second capacitor C2, the third diode D3 and the first reactor L1 are connected in series. Fifth connected in parallel to the circuit
A diode Dx1, a sixth diode Dx2 connected in parallel to a circuit in which the second reactor L2 and the fourth diode D4 are connected in series, and the first and second diodes Dx1. And a switch control circuit for turning on and off the switches S1 and S2 alternately at a predetermined cycle with a dead time. In addition, as shown in claim 2 and FIG. 6, the fifth and sixth diodes Dx1 of claim 1 and FIG.
A circuit configuration in which a fifth diode Dx is connected in parallel to a circuit in which a third diode D3 and first and second reactors L1, L2 and a fourth diode D4 are connected in series instead of Dx2. can do. Claim 3
And the first and second reactors L1, as shown in FIG.
L2 are electromagnetically coupled to each other to form a first and a second diode D
1 and D2 can be connected in antiparallel to the first and second switches S1 and S2. Further, as shown in claim 4 and FIG. 12, only one fifth diode Dx can be provided instead of the fifth and sixth diodes Dx1 and Dx2 in claim 3 and FIG. Further, as shown in claim 5 and FIG. 13, the third and fourth reactors L1a and L2a are connected in series to the first and second diodes D1 and D2, and the first and fourth reactors L1 and L2a are connected. The second and third reactors L2 and L1a can be mutually electromagnetically coupled to each other. Further, as shown in claim 6 and FIG. 16, a circuit may be provided in which one fifth diode Dx is provided in place of the fifth and sixth diodes Dx1 and Dx2 in claims 5 and 13. Claim 7 and FIG.
As shown in FIG. 7, the first and second switches S1, S2 and the first and second reactors L1, L1 of FIG.
2 and the first and second capacitors C1
, C2 and the fifth and sixth diodes Dx1, Dx2. Claim 8 and FIG.
As shown in FIG. 5, the third and fourth diodes D3 and D4 are connected in parallel to the first and second reactors L1 and L2 by omitting the fifth and sixth diodes Dx1 and Dx2 of claim 1 and FIG. It can be a connected circuit. Claim 9
As shown in FIG. 23 and FIG. 23, the fifth and sixth diodes Dx1 and Dx2 in claims 1 and 1 can be omitted, and the first and second capacitors C1 and C2 can be replaced here.

[0005]

According to the present invention, the first and second switches S1, S2 in the inverter circuit are provided.
Switching loss, noise, and surge voltage can be reduced with a relatively simple circuit.

[0006]

First Embodiment Next, a bridge type inverter device according to a first embodiment of the present invention will be described with reference to FIGS.
As shown in FIG. 1, this inverter device is configured to convert a DC voltage of a DC power supply 1 into an AC by a bridge type inverter circuit and supply the AC to a load 2. The DC power supply 1 includes a rectifier circuit or a battery, and the load 2 includes, for example, an output transformer 3 connected to load connection terminals 2a and 2b and a load circuit 4 connected thereto.

The inverter circuit comprises a combination of first and second switch circuits 5a and 5b having a half-bridge configuration. The first switch circuit 5a includes first and second switches S1, S1 for forming a first arm of a bridge circuit.
2 and first and second diodes D1 and D2, besides having first and second diodes D1 and D2 to achieve ZVS or ZCS.
Capacitors C1, C2, first and second reactors L1, L2, and third, fourth, fifth and sixth diodes D3, D4, Dx1, Dx2. The second switch circuit 5b has third and fourth switches S3 and S4 for forming the second arm of the bridge circuit and seventh and eighth diodes D5 and D6, and also achieves ZVS and ZCS. In order to achieve this, the third and fourth capacitors C3, C4
And third and fourth reactors L3 and L4, and ninth to twelfth diodes D7, D8, Dy1, and Dy2.

A first circuit composed of a series circuit of a first switch S1 and a first reactor L1 is connected between one end of the power supply 1 and a first load connection terminal 2a. A second circuit comprising a series circuit of a second reactor L2 and a second switch S2 is connected between the first load connection terminal 2a and the other end of the power supply 1. First and second diodes D1 and D2 are connected to the first and second circuits in anti-parallel.

The anode of the fifth diode Dx1 and the sixth diode Dx1
Of the diode Dx2 is connected to an interconnection point of the first and second reactors L1 and L2.
The cathode of the fifth diode Dx1 is the third diode Dx1.
3 through the first switch S1 of the first reactor L1.
And the anode of the sixth diode Dx2 is connected to the second reactor L2 via the fourth diode D4.
Of the second switch S2. First
Of the capacitor C1 is connected to the collector of the first switch S1, and the other end is connected to a third and a fifth diode D1.
3, connected to the interconnection point of Dx1. One end of the second capacitor C2 is connected to fourth and sixth diodes D4 and Dx2.
And the other end thereof is connected to a second switch S
2 connected to the emitter.

The second switch circuit 5b is substantially the same as the first switch circuit 5a, and a third switch S3 is provided between one end of the power supply 1 and the second load connection terminal 2b.
And a third circuit composed of a series circuit of a third reactor L3. Second load connection terminal 2b and power supply 1
A fourth circuit composed of a series circuit of a fourth reactor L4 and a fourth switch S4 is connected to the other end of the fourth circuit. The seventh and eighth diodes D5 and D6 are connected in parallel to the third and fourth circuits. Eleventh diode D
The anode of y1 and the cathode of the twelfth diode Dy2 are connected to the interconnection point of the third and fourth reactors L3, L4. The cathode of the eleventh diode Dy1 is connected via a ninth diode D7 to the terminal on the third switch S3 side of the third reactor L3, and the anode of the twelfth diode Dy2 is connected via a tenth diode D8. It is connected to a terminal on the fourth switch S4 side of the fourth reactor L4. One end of the third capacitor C3 is connected to the collector of the third switch S3, and the other end is connected to the interconnection point of the ninth and eleventh diodes D7 and Dy1. One end of the fourth capacitor C4 is connected to the tenth capacitor C4.
And the twelfth diode D8, Dy2, and the other end thereof is connected to the emitter of the fourth switch S4.

In FIG. 1, some of the connection lines between the switches are omitted for the sake of illustration, but the control terminals (bases) of the switches S1 to S4 are connected to a control circuit 6. As shown in FIG. 2, the control circuit 6 includes first, second and third control circuits.
And a fourth control pulse generation circuit 7, 8, 9, 10, an oscillator 11, and a phase control circuit 12. The first and second control pulse generating circuits 7 and 8 are controlled by the oscillator 11 to generate the first and second control pulses shown in FIGS. It supplies to the bases of the first and second switches S1, S2. The third and fourth control pulse generation circuits 9 and 10 include an oscillator 11 and a phase control circuit 12.
To generate the third and fourth control pulses shown in FIGS. 3 (C) and 3 (D).
3, supply to S4 base. The first and second control pulses and the third and fourth control pulses are the same except that they have a phase difference therebetween. The first and second control pulses shown in FIGS. 3A and 3B are alternately generated with a time interval (dead time) Ta, and the third control pulse shown in FIGS. 3C and 3D. And the fourth control pulse also alternately occurs with a time interval Ta.

[0012]

[Operation] The basic operation of the inverter circuit shown in FIG. 1 is the same as that of a known inverter. That is, the power supply 1, the first switch S1, the first reactor L1, the load 2, the sixth reactor L6, and the fourth switch S4 during the period when the first and fourth switches S1 and S4 are simultaneously turned on. In the circuit, a current in the first direction flows to the load 2 and the second and third switches S
2 and S3 are simultaneously turned on, a circuit composed of the power supply 1, the third switch S3, the fifth reactor L5, the load 2, the second reactor L2 and the second switch S2 applies the load 2 in the second direction. Current flows. As a result, FIG.
A voltage V0 shown in FIG. 3E is applied, and a current I0 shown in FIG. 3F flows. The current I0 flows as shown by a solid line when an inductive delay load is applied, and flows as shown by a dotted line when a capacitive load is applied.

Next, the operation of the first to fourth switches S1 to S4 during the turn-on and turn-off periods will be described. However, the operation during the turn-off of the first switch S1 and the turn-on of the second switch S2, the operation during the turn-off of the second switch S2 and the turn-on of the first switch S1, and the operation of the third switch S3 Operation during the turn-off and the turn-off of the fourth switch S4;
Turn off of the fourth switch S4 and the third switch S
3 is substantially the same as the operation during the turn-off period, the operation during the turn-off period of the first switch S1 and the turn-off period of the second switch S2 will be described in detail with reference to FIGS. The description of the operation in other periods is omitted. FIG. 4 shows the operation at the time of a delay load, and FIG. 5 shows the operation at the time of a lead load. Here, the operation at the time of the delay load will be mainly described, and the operation of the advance load will be briefly described later.

[0014]

[Operation Before t1] In the period before the time t1 in FIG. 4, the first and fourth switches S1 and S4 are on, so that the first switch S1 and the first and second reactors L1 and L1 are turned on. In the circuit of L2, the fourth diode D4 and the second capacitor C2, the second capacitor C2 is almost charged to the power supply voltage as shown in FIG. A current also flows through the circuit of the third capacitor C3, the diode D7, the reactors L3 and L4, and the fourth switch S4, and the capacitor C3 is charged. Further, the current Is1 of the first switch S1 and the current IL1 of the first reactor L1 flow as shown in FIGS.

[0015]

[Turn off and turn on] Second capacitor C2
Is substantially charged to the power supply voltage V, the first switch S1 is turned off at a time point t1, and when the second switch S2 is turned on at a predetermined time after t2, the energy of the second capacitor C2 is The second capacitor C2, the sixth diode Dx2, the load 2, the fourth reactor L4 and the fourth switch S4 are discharged by a circuit, and the voltage Vc2 of the second capacitor C2 is changed as shown in FIG. descend.
At the same time, a circuit including the first capacitor C1, the third diode D3, the first reactor L1, the load 2, and the fourth switch S4 is formed.
1 is charged as shown in FIG. The ON point of the second switch S2 is set at the time point t2 when the voltage Vc2 of the second capacitor C2 becomes substantially zero. Therefore, ZVS (zero volt switching) of the second switch S2
Is achieved. The voltage Vc1 of the first switch S1 is almost the same as the voltage Vc1 of the first capacitor C1 in FIG. 4E as shown in FIG. 4D, and gradually increases from the time t1 to the time t2. Since it increases, it becomes ZVS at the time of this turn-off. As a result, ZVS at the time of turning off and turning on the first and second switches is achieved, switching loss is reduced, and noise and surge are suppressed. Even if the second switch S2 is turned on at t2, if the load 2 is a delayed load, current in the first direction (positive direction) continues to flow. This load current flows through a circuit including the load 2, the fourth reactor L4, the fourth switch S4, and the second diode D2. Therefore, the second diode D2
The current Id2 flows from t2 as shown in FIG.
The current IL1 of the first reactor L1 is equal to the first and second currents IL1.
Reactors L1, L2, the fourth diode D4 and the sixth
, A fifth diode Dx1, and a third diode D3. FIG.
(D) (E) (F) t1 to t of the voltages Vs1, Vc1, and Vc2
Although the waveforms of the two sections are schematically shown as linearly changing, in actuality, the sinusoidal waves of 0 to 9 are caused by LC resonance.
It changes with the waveform in the 0-degree section or the 90-180 degree section.

When the load 2 is an advanced load, the components in FIG. 1 change as shown in FIG. Fig. 3 in case of leading load
As shown by the dotted line in (F), the current I0 flows in the second direction (negative direction) at time t1. This negative current flows in a circuit including the load 2, the diode D1, the power supply 1, and the diode D6. Therefore, during the period from t1 to t2, the current Id1 of the diode D1 flows as shown in FIG. Also, the second
Capacitor C2 is charged to approximately the power supply voltage before time t1, and the first capacitor C1 is connected to the first diode D1.
It is almost zero volts because 1 is conducting. Therefore,
At the turn-off of t1, the voltage of the first switch S1 is almost zero and ZVS is achieved. At time t2 in FIG.
Is turned on as shown in FIG. 5B, the load 2, the second reactor L2 and the second switch S2 are turned on.
A closed circuit of 2 and diode D6 is also formed, and the load current also flows here. During the period from t2 to t3, the first diode D1 is forward-biased and kept on.
The second reactor L2 is kept substantially at the power supply voltage as shown in FIG. 5 (E), and the current IL2 flowing therethrough increases linearly as shown in FIG. 5 (D). When the first diode D1 is cut off at time t3, the load current flows only through the second reactor L2. In the period from t3 to t4, the discharging circuit of the second capacitor C2 is formed by the circuit of the second capacitor C2, the sixth diode Dx2, the second reactor L2, and the second switch S2, through which the LC resonance current flows. . Accordingly, the current IL2 of the second reactor L2 during the period from t3 to t4 has a waveform in which the resonance current is superimposed on the load current as shown in FIG. When the resonance current substantially reaches the peak of the sine wave at time t4, the voltage VL2 of the second reactor L2 becomes zero volts as shown in FIG. 5E, and after t4, the second diode D2 is forward-biased and The current component is the current I of the closed circuit of the second reactor L2, the second switch S2 and the second diode D2.
The current Idx2 flows through the closed circuit of d2, the second reactor L2, the fourth diode D4, and the sixth diode Dx2. This circulating current gradually decreases from time t4 as shown in FIG.

As is apparent from the above description, in the case of a forward load, ZVS is achieved when the first switch S1 is turned off at t1 at t1, and when the second switch S2 is turned on at t2 as shown in FIG. 5D. ZCS (zero current switch) is achieved, and switching loss can be reduced.

[0018]

Second Embodiment Next, an inverter device according to a second embodiment will be described with reference to FIGS. However, in FIGS. 6 to 8 and FIGS. 9 to 23 to be described later, substantially the same parts as those in FIGS. 1 to 5 are denoted by the same reference numerals, and description thereof is omitted. In the following, current paths are indicated only by reference numerals of elements. The configuration is the same as that of FIG. 1 except that diodes Dx and Dy are provided instead of the diodes Dx1, Dx2, Dy1, and Dy2 in FIG. The diode Dx is the third diode Dx
3 and a first and second reactor L1, L2 and a fourth diode D4, which are connected in parallel to a series circuit,
Diode Dy is connected to diode D7 and reactors L3 and L4.
And a diode D8.

FIG. 7 shows the operation at the time of inductive or delayed load.
The state prior to the time point t1 is the same as that in FIG.
In the period from t1 to t2 in FIG. 7, C2 -Dx -D3 -L1-
In the circuit of 2-L4 -S4, the second capacitor C2 is discharged, and this voltage Vc2 gradually decreases as shown in FIG. 7 (F) and becomes 0V at t2. Therefore, when the second switch S2 is turned on at t2, ZVS is achieved. In the period from t1 to t2, 1-C1 -D3 -L1 -2 -L
The first capacitor C1 is charged in the circuit of 4-S4, and the voltage Vc1 gradually increases as shown in FIG.
The voltage Vs1 of the first switch S1 also gradually increases as shown in FIG. 7D, and ZVS is achieved. When the voltage Vc2 of the second capacitor C2 becomes 0 V at the time t2, the reverse bias of the second diode D2 is released and the load current becomes 2V.
The current flows through the circuit of -L4-S4-D2, and the current Id2 of the diode D2 changes as shown in FIG. t2 to t3
The current IL1 of the first reactor L1 during the period is L1−L
It flows in the circuit of 2-D4-Dx-D3. When the second switch S2 is turned on at t2, the voltage Vc2 of the second capacitor C2 is 0V as shown in FIG. 7 (F), and the voltage of the second switch S2 is also 0V, thereby achieving ZVS. You.

FIG. 8 shows the state of each part in FIG. 6 at the time of the advance load. As is clear from the comparison between FIG. 5 and FIG. 8, the operation of the circuit of FIG. 6 when the load is advanced is substantially the same as the operation of the circuit of FIG. 1 when the load is advanced. That is, the operation before t2 in FIG. 8 is the same as before t2 in FIG. 5, and during the period from t2 to t3 in FIG. 8, the current Id1 of the first diode D1 is changed to the state shown in FIG.
The power supply voltage is applied to the second reactor L2, and the current IL2 rises linearly as shown in FIG. 8D. In the period from t2 to t3, FIG.
The voltage VL1 + VL2 shown in (E) is determined by VL2. When the first diode D1 is cut off at t3 in FIG. 8, a resonance current flows through the closed circuit of C2-Dx-D3-L1-L2-S2, and the current IL2 of the second reactor L2 increases with a sine wave. And the first and second reactors L1
, L2, the voltage VL1 + VL2 decreases with a sine wave and becomes zero at t4.
V, and the second diode D2 is forward biased.
Below t4, the resonance current flows through the circuit of L2-S2-D2 and the circuit of L2-D4-Dx-D3-L1,
Decrease gradually. Since the inverter device of the second embodiment operates essentially the same as the first embodiment, the same operation and effect can be obtained.

[0021]

Third Embodiment An inverter device according to a third embodiment shown in FIG. 9 includes diodes D1, D2, D5 and D6 connected to a switch S.
1 except that the first and second reactors L1 and L2 and the third and fourth reactors L3 and L4 are respectively electromagnetically coupled to each other in parallel to 1, S2, S3 and S4. It was done.

FIG. 10 shows the state of each part of the inverter device of FIG. 9 in the case of a delayed load. FIG.
(F) is the same as FIGS. 4 (A) to (F). FIG.
2 is different from FIG. When the second switch S2 is turned on when the voltage Vc2 of the second capacitor C2 becomes 0 V as shown in FIG. 10F at t2 in FIG. 10, ZVS is achieved. Further, at time t2, the reverse bias of the second diode D2 is released, and 2-L4 -S4
In the circuit of -D2 -L2, the current Id2 of the diode D2 is shown in FIG.
At the same time as flowing as shown in FIG. 10 (I), a current IL2 of the second reactor L2 flows as shown in FIG. 10 (H). Since the first and second reactors L1 and L2 are electromagnetically coupled to each other, after t2, the current IL1 of the first reactor L1 becomes zero as shown in FIG. 10 (G).

FIG. 11 shows the state of each part of the inverter device of FIG. 9 in the case of a leading load. FIGS. 11A to 11C are the same as FIGS. 5A to 5C. FIGS. 11D and 11E show currents IL1 and IL2 of the first and second reactors L1 and L2.
FIG. 11 (F) shows the first and second reactors L1
, L2 of voltages VL1 and VL2 are shown together, and FIG.
Indicates the current Is2 of the second switch S2. FIG. 11 (E)
The current Ic2 of the second reactor L2 changes in the same manner as the current IL2 in FIG. The voltage VL1 + VL2 of FIG.
Changes in the same manner as the voltage VL2 in FIG. T in FIG.
At time 1, the first diode D1 is conducting, so
The voltage of the first switch S1 is 0V, and ZVS is achieved. Since the current Is2 of the second switch S2 gradually starts flowing from the time point t2 in FIG. 11, ZCS of the second switch S2 is achieved. In the period from t2 to t3, FIG.
(C) As shown in (D), the current Id1 of the first diode D1 and the current IL1 of the first reactor L1 gradually decrease linearly, and conversely, the current IL2 of the second reactor L2 and the second current IL2 decrease. The current Is2 of the switch S2 gradually increases linearly as shown in FIGS. When the current IL2 of the second reactor L2 becomes equal to the value of the load current at time t3, the first diode D1 is cut off. In the subsequent period from t3 to t4, a sinusoidal resonance current flows through the closed circuit of C2-Dx2-L2-S2, and the second capacitor C2
Discharges. Therefore, during the period from t3 to t4, a combined current of the load current and the resonance current flows through the second reactor L2 and the second switch S2. When the resonance current reaches the peak of the sine wave at time t4, the fourth diode D4 conducts and L1-
A circulating current flows through the circuit of L2-D4-Dx2-Dx1-D3, which gradually decreases.

Since the inverter of FIG. 9 operates essentially the same as the inverter of FIG. 1, it has the same effects as the first embodiment.

[0025]

Fourth Embodiment In an inverter device according to a fourth embodiment shown in FIG. 12, the diodes Dx1, Dx2, Dy1, and Dy2 in FIG. 9 are replaced with diodes Dx and Dy.
, Dy are formed in the same manner as in FIG. 9 except that they are connected in the same manner as in FIG. Accordingly, the circuit of FIG. 12 operates in the same manner as the circuit of FIG. 9 except that the discharge path of the second capacitor C2 is similar to that of FIG. Although the waveform of each part of the circuit of FIG. 12 is not particularly shown, it is substantially the same as FIG. 10 and FIG. Therefore, the same operation and effect as those of the circuit of FIG. 9 can be obtained by the circuit of FIG.

[0026]

Fifth Embodiment An inverter device according to a fifth embodiment shown in FIG. 13 has additional reactors L1a, L2a, L3 added to the circuit shown in FIG.
Except that a and L4a were provided, it was formed in the same manner as in FIG. The additional reactors L1a, L2a are referred to as third and fourth reactors in the claims and are connected in series with diodes D1, D2.
Reactor L1a is electromagnetically coupled to second reactor L2, and reactor L2a is electromagnetically coupled to first reactor L1. The additional reactors L3a and L4a of the second switch circuit 5b are connected in series to the diodes D5 and D6, and are electromagnetically coupled to the reactors L4 and L3.

FIG. 14 shows the state of each part of the circuit of FIG. 13 at the time of a delay load. As is clear from the comparison between FIG. 10 and FIG. 14, FIG. 14 is the same as FIG. 10 except that the reactor current IL2 in FIG. 10H is replaced with the reactor current IL2a. Therefore, the operation of the circuit of FIG. 13 is essentially the same as the operation of the circuit of FIG. In FIG. 13, since the first reactor L1 and the additional reactor L2a are electromagnetically coupled, FIG.
When the second diode D2 becomes conductive at time t2,
The current IL1 flowing through the reactor L1 is immediately commutated to the additional reactor L2a.

FIG. 15 shows the state of each part in FIG. 13 at the time of advance load. The operation of the circuit of FIG. 13 when the load is advancing is substantially the same as the operation of the circuit of FIG. 9 when the load is advancing, and even if the first switch S1 is turned off from on at t1 in FIG. No change occurs in other parts. When the second switch S2 is turned on at time t2, the current IL1a of the additional reactor L1a shown in FIG. 15D is immediately commutated to the second reactor L2, and the current IL2 shown in FIG. 15E flows.
At the same time, a resonance current flows through the closed circuit of C2-Dx2-L2-S2. Therefore, a current in which the resonance current is superimposed on the load current flows through the reactor L2. When the resonance current reaches the peak of the sine wave at time t3, the diode D4 conducts,
A circulating current flows through the circuit of L2-D4-Dx2.

Since the circuit of FIG. 13 is essentially the same as the circuit of FIG. 9, it has the same effect as the circuit of FIG.

[0030]

Sixth Embodiment In an inverter device according to a sixth embodiment shown in FIG. 16, two diodes Dx1 and Dx2 in FIG. 13 are replaced with one diode Dx.
1 except that y1 and Dy2 are replaced with one diode Dy
3 is formed identically. Diode D in FIG.
x and Dy are connected in the same manner as the diodes Dx and Dy in FIG. 6 and operate in the same manner as in FIG. Therefore, the circuit of FIG. 16 has the same effect as that of FIGS.

[0031]

Seventh Embodiment An inverter device according to a seventh embodiment shown in FIG. 17 has the switches S1, S2, S3 in the circuit of FIG.
, S4 and the reactors L1, L2, L3 and L4 are interchanged, the capacitors C1, C2, C3 and C4 are interchanged with the diodes Dx1, Dx2, Dy1 and Dy2, and the directions of the diodes D3, D4, D7 and D8 are reversed. The other parts are the same as those shown in FIG.

FIG. 18 shows the state of each part in FIG. 17 at the time of a delay load. (A) to (H) in FIG. 18 are (A) to (H) in FIG.
It changes like (H). Therefore, the basic operation of the circuit of FIG. 17 is the same as the basic operation of the circuit of FIG. In the circuit of FIG. 17, 1-L1 -S1 -C2 -D4-before t1.
The capacitor C2 is charged in the circuit of L2. At this time, the voltage Vc1 of the capacitor C1 is 0V. When the first switch S1 is turned off at time t1, the current IL1 of the first reactor L1 is commutated to the third diode D3, and 1-L1-
In the circuit of D3 -C1 -2 -S4 -L4, one half of the load current
Flows, and the other half of the load current flows in the circuit of C2 -2 -S4 -L4 -Dx2. As a result, the voltage Vc1 of the first capacitor C1 gradually increases during the period from t1 to t2 in FIG. 18 as shown in FIG. 18E, and the voltage Vc2 of the second capacitor C2 becomes as shown in FIG. So gradually lower. As a result, ZVS of the first switch S1 is achieved at time t1, and ZVS of the second switch S2 is achieved at time t2.
VS is achieved. When the voltage Vc2 of the second capacitor C2 becomes 0V at the time t2, the reverse bias of the second diode D2 is released, and the diode D2 is turned on, and the second diode D2 is turned on.
As shown in FIG. 8 (H), a current Id2 flows therethrough, which becomes a load current. That is, the current Id2 flows in the circuit of 2-S4-L4-D2. The current IL1 of the first reactor L1 flows as a circulating current in the circuit of L1-D3-Dx1.

FIG. 19 shows the state of each part in FIG. 17 at the time of advance load. (A) to (F) of FIG. 19 are (A) to (F) of FIG.
It shows the waveform of the same part as (F). FIG.
As is clear from comparison between (A) to (F) and (A) to (F) in FIG. 5, both are substantially the same. Therefore, the circuit of FIG. 17 operates substantially the same as the circuit of FIG. That is, even if the first switch S1 is turned off at the time t1 in FIG. 19, the state of the other parts does not change. When the second switch S2 is turned on at time t2,
While the first diode D1 is conducting, the power supply voltage is applied to the second reactor L2, and this current IL2 linearly increases from t2 to t3 as shown in FIG. Therefore, the load current flows through 2-D1-1-D6, and
2-S2-L2-D6. Second reactor L2
When the current IL2 becomes equal to the load current, the first diode D1 is cut off, and the discharge of the capacitor C2 becomes C2-
Starting with a closed circuit of S2-L2-Dx2, a resonance current flows. The current IL2 of the second reactor L2 is obtained by superimposing the resonance current on the load current. When the resonance current reaches the peak of the sine wave at time t4, the diode D4 becomes forward-biased and the current of the second reactor L2 becomes L2-Dx2-D4.
And the closed circuit of L2 -D2 -S2.

The operation of the circuit of FIG. 17 is essentially the same as the operation of FIG. 1, so that the same effect as that of the circuit of FIG. 1 can be obtained.

[0035]

Eighth Embodiment An inverter device according to an eighth embodiment shown in FIG. 20 includes diodes Dx1, Dx2, Dy1,
The configuration is the same as that of FIG. 1 except that Dy2 is omitted. Therefore, in FIG. 20, diodes D3, D4, D7, D8 are directly connected in parallel to reactors L1, L2, L3, L4.

FIG. 21 shows the state of each part of the circuit of FIG. 20 in the case of a delay load. (A) to (H) of FIG.
2 shows waveforms at the same locations as in FIGS. 4A to 4H, and FIG.
1 (I) and (J) are first and second capacitors C1, C2.
2 shows currents Ic1 and Ic2. Since the waveforms of (A) to (H) of FIG. 21 are substantially the same as the waveforms of (A) to (H) of FIG. 4, the circuit of FIG. 20 operates similarly to the circuit of FIG.
That is, before the time t1, the first switch S1 is on, so that the load current flows through 1-S1-L1-L4-S4, and the second capacitor C2 is connected by 1-S1-L1-C2. Charged to the power supply voltage. At this time, the voltage Vc1 of the first capacitor C1 is 0V. First at time t1
Is turned off, the first capacitor C1 is turned off.
, The voltage Vs1 of the first switch S1 and the voltage Vc1 of the first capacitor C1 gradually increase as shown in FIGS. 21D and 21E, and the ZVS of the first switch S1 is increased.
Is achieved. At the same time, the discharge of the second capacitor C2 starts, and the voltage Vc2 gradually decreases as shown in FIG. Also, the current I of the first reactor L1
L1 continues to flow while attenuating in the closed circuit of L1 -D3. When the voltage Vc2 of the second capacitor C2 becomes 0 V at the time t2, the second diode D2 becomes forward-biased, and the load current is diverted to the second diode D2, resulting in 2-L4-S
4- It flows in the circuit of D2. The second switch S2 is turned on at t2 or later at t3. At time t2, the voltage Vc2 of the second capacitor C2 is 0 V, so that ZVS of the second switch S2 is achieved.

FIG. 22 shows the state of each part of the circuit of FIG. 20 in the case of an advanced load. FIGS. 22A to 22C show the same parts as FIGS. 5A to 5C, FIG. 22D shows the voltage Vc1 of the first capacitor C1, and FIG. The voltage Vc2 of the capacitor C2, (F) is the current IL1 of the first reactor L1, and (G) is the first and second capacitors C1, C
2, the currents Ic1, Ic2, (H) represent the current IL2 of the second reactor L2, and (I) represents the current Id2 of the second diode D2. The operation of the circuit of FIG. 20 for a leading load is basically the same as the operation of the circuit of FIG. 1 for a leading load.
Even if the first switch S1 is turned off at the time t1 of 2, the state does not change in other parts. When the second switch S2 is turned on at time t2, a part of the load current of 2-L2-S2-D6 is commutated, and the current IL2 of the second reactor L2 gradually decreases as shown in FIG. Increase and conversely 2
The current Id1 of the first diode D1 flowing through -D1-1-D6 gradually decreases as shown in FIG. t
When the first diode D1 is cut off at time 3,
The discharge of the second capacitor C2 starts, and C2-L2-S
2, the resonance current flows, the voltage Vc2 of the second capacitor C2 gradually decreases as shown in FIG. 22 (E), and the voltage Vc1 of the first capacitor C1 becomes as shown in FIG. 22 (D). Gradually higher. The charging current of the first capacitor C1 flows through 1-C1-L2-S2. At time t4, when the voltage Vc2 of the second capacitor C2 becomes 0 V and the sinusoidal resonance current peaks, the second diode D2
2 becomes forward biased, and the resonance current attenuates and flows through the closed circuit of L2-S2-D2. A circulating current corresponding to the resonance current also flows through the closed circuit of L2 -D4. Note that FIG.
The current IL2 of the second reactor L2 in (H) is obtained by superimposing the resonance current on the load current. In the case of this advanced load, ZVS becomes at the time of turn-off, and VCS becomes at the time of turn-on.
Becomes

Since the circuit of FIG. 20 is essentially the same as the circuit of FIG. 1, the same effects as those of the circuit of FIG. 1 can be obtained.

[0039]

Ninth Embodiment An inverter device according to a ninth embodiment shown in FIG. 23 includes capacitors C1, C2, C3, and C4 of FIG.
20 except that they are connected in parallel via D4, D7 and D8 and the directions of the diodes D3, D4, D7 and D8 are reversed.
It has the same configuration as that of FIG. Even with such a configuration, the operation is substantially the same as in FIG. 20, and the same effect is obtained.

[0040]

[Modifications] The present invention is not limited to the above-described embodiment, and for example, the following modifications are possible. (1) A three-phase or multi-phase bridge-type inverter device can be configured by preparing three or many devices corresponding to the first switch circuit 5a in each embodiment and connecting them in three-phase or multi-phase. . (2) The switches S1 to S4 can be semiconductor switches such as field effect transistors. These can be used as antiparallel diode-containing elements. (3) Also in the first to seventh embodiments, the ON point of the second switch S2 is determined by the second capacitor C2 as in FIG.
Can be made later than the time t2 when the voltage Vc2 becomes 0V.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing an inverter device according to a first embodiment.

FIG. 2 is a block diagram showing a control circuit of FIG. 1;

FIG. 3 is a waveform diagram showing each part of FIG. 2 and an output voltage and a load current of FIG. 1;

FIG. 4 is a waveform chart of each part of the circuit of FIG. 1 when a delay load is applied.

FIG. 5 is a waveform diagram of each part of the circuit of FIG. 1 at the time of an advanced load.

FIG. 6 is a circuit diagram of an inverter device according to a second embodiment.

FIG. 7 is a waveform chart of each part of the circuit of FIG. 6 at the time of a delay load.

8 is a waveform diagram of each part of the circuit of FIG. 6 at the time of a leading load.

FIG. 9 is a circuit diagram of an inverter device according to a third embodiment.

10 is a waveform diagram of each part of the circuit of FIG. 9 at the time of a delay load.

11 is a waveform chart of each part of the circuit of FIG. 9 at the time of advance load.

FIG. 12 is a circuit diagram showing an inverter device according to a fourth embodiment.

FIG. 13 is a circuit diagram showing an inverter device according to a fifth embodiment.

14 is a waveform chart of each part of the circuit of FIG. 13 at the time of a delay load.

15 is a waveform chart of each part of the circuit of FIG. 13 at the time of a leading load.

FIG. 16 is a circuit diagram showing an inverter device according to a sixth embodiment.

FIG. 17 is a circuit diagram showing an inverter device according to a seventh embodiment.

18 is a waveform diagram of each part of the circuit of FIG. 17 when a delay load is applied.

19 is a waveform chart of each part of the circuit of FIG. 17 at the time of advance load.

FIG. 20 is a circuit diagram showing an inverter device according to an eighth embodiment.

21 is a waveform chart of each part of the circuit of FIG. 20 when a delay load is applied.

FIG. 22 is a waveform chart of each part of the circuit of FIG. 20 at the time of advance load.

FIG. 23 is a circuit diagram showing an inverter device according to a ninth embodiment.

[Explanation of symbols]

 S1 to S4 switch L1 to L4 reactor C1 to C4 capacitor

Claims (9)

(57) [Claims] 1. One or more switch circuits are connected between one end and the other end of a DC power supply, and the switch circuits supply a load with a current in a first direction and a current in a second direction opposite thereto. In a bridge-type, half-bridge-type, or polyphase-bridge-type inverter device configured to flow a current, at least one of the switch circuits includes a series connection of a first switch (S1) and a first reactor (L1). A circuit, wherein the first switch (S1) is disposed at one end of the power supply (1) with respect to the first reactor (L1), and the first switch (S1) and the first reactor (L1) is connected between one end of the power supply (1) and one end of the load, and a series circuit of a second switch (S2) and a second reactor (L2). And the second switch A second switch (S2) is disposed on the other end side of the power supply (1) with respect to the second reactor (L2), and the second reactor (L2) and the second switch (S2) are connected to the load of the load. A second circuit connected between one end and the other end of the power supply (1); and a second circuit having a direction opposite to the first and second switches (S1, S2). First and second diodes (D1, D2) connected in parallel to the first and second circuits; a first capacitor (C1) having one end connected to one end of the power supply (1); A second capacitor (C2) having one end connected to the other end of the power supply (1); the other end of the first capacitor (C1); and the first switch of the first reactor (L1). A third diode (D3) connected between the terminal (S1) and the second reactor (L2); A fourth diode (D4) connected between the terminal on the second switch (S2) side and the other end of the second capacitor (C2); and a third diode (D3). A fifth diode (Dx1) connected in parallel to a circuit in which the first reactor (L1) is connected in series; a second diode (L2) and the fourth diode; (D4) and a sixth diode (Dx2) connected in parallel to a circuit connected in series with the first and second switches (S1, S2).
A switch control circuit that has a time and alternately turns on in a predetermined cycle. 2. One or a plurality of switch circuits are connected between one end and the other end of the DC power supply, and the switch circuits apply a current in a first direction and a current in a second direction opposite thereto. In a bridge-type, half-bridge-type, or polyphase-bridge-type inverter device configured to flow a current, at least one of the switch circuits includes a series connection of a first switch (S1) and a first reactor (L1). A circuit, wherein the first switch (S1) is disposed at one end of the power supply (1) with respect to the first reactor (L1), and the first switch (S1) and the first reactor (L1) is connected between one end of the power supply (1) and one end of the load, and a series circuit of a second switch (S2) and a second reactor (L2). And the second switch A second switch (S2) is disposed on the other end side of the power supply (1) with respect to the second reactor (L2), and the second reactor (L2) and the second switch (S2) are connected to the load of the load. A second circuit connected between one end and the other end of the power supply (1); and a second circuit having a direction opposite to the first and second switches (S1, S2). First and second diodes (D1, D2) connected in parallel to the first and second circuits; a first capacitor (C1) having one end connected to one end of the power supply (1); A second capacitor (C2) having one end connected to the other end of the power supply (1); the other end of the first capacitor (C1); and the first switch of the first reactor (L1). A third diode (D3) connected between the terminal (S1) and the second reactor (L2); A fourth diode (D4) connected between the terminal on the second switch (S2) side and the other end of the second capacitor (C2); and a third diode (D3). A fifth diode (A) connected in parallel to a circuit in which the first reactor (L1), the second reactor (L2), and the fourth diode (D4) are connected in series. Dx) and the first and second switches (S1, S2) are dead-locked.
A switch control circuit that has a time and alternately turns on in a predetermined cycle. 3. One or more switch circuits are connected between one end and the other end of the DC power supply, and the switch circuits apply a current in a first direction and a current in a second direction opposite to the load to a load. In a bridge-type, half-bridge-type, or polyphase-bridge-type inverter device configured to flow a current, at least one of the switch circuits includes a series connection of a first switch (S1) and a first reactor (L1). A circuit, wherein the first switch (S1) is disposed at one end of the power supply (1) with respect to the first reactor (L1), and the first switch (S1) and the first reactor (L1) is connected between one end of the power supply (1) and one end of the load, and a series circuit of a second switch (S2) and a second reactor (L2). And the second switch A second switch (S2) is disposed on the other end side of the power supply (1) with respect to the second reactor (L2), and the second reactor (L2) and the second switch (S2) are connected to the load of the load. A second circuit connected between one end and the other end of the power supply (1); a first circuit and a second circuit connected in anti-parallel to the first and second switches (S1, S2). Diodes (D1, D2)
A first capacitor (C1) having one end connected to one end of the power supply (1), a second capacitor (C2) having one end connected to the other end of the power supply (1), A third diode (D3) connected between the other end of the first capacitor (C1) and a terminal on the first switch (S1) side of the first reactor (L1); A fourth diode (D4) connected between the second switch (S2) side terminal of the second reactor (L2) and the other end of the second capacitor (C2); A fifth diode (Dx1) connected in parallel to a circuit in which a diode (D3) and the first reactor (L1) are connected in series; and a second reactor (L2). The fourth diode (D4) is connected in parallel to a circuit connected in series. Dead connected sixth diode (Dx2), said first and second switches (S1, S2) ·
A switch control circuit for alternately controlling the ON state in a predetermined cycle with time, and wherein the first and second reactors (L1, L2) are electromagnetically coupled to each other. apparatus. 4. One or more switch circuits are connected between one end and the other end of the DC power supply, and the switch circuits apply a current in a first direction and a current in a second direction opposite to the load to a load. In a bridge-type, half-bridge-type, or polyphase-bridge-type inverter device configured to flow a current, at least one of the switch circuits includes a series connection of a first switch (S1) and a first reactor (L1). A circuit, wherein the first switch (S1) is disposed at one end of the power supply (1) with respect to the first reactor (L1), and the first switch (S1) and the first reactor (L1) is connected between one end of the power supply (1) and one end of the load, and a series circuit of a second switch (S2) and a second reactor (L2). And the second switch A second switch (S2) is disposed on the other end side of the power supply (1) with respect to the second reactor (L2), and the second reactor (L2) and the second switch (S2) are connected to the load of the load. A second circuit connected between one end and the other end of the power supply (1); a first circuit and a second circuit connected in anti-parallel to the first and second switches (S1, S2). Diodes (D1, D2)
A first capacitor (C1) having one end connected to one end of the power supply (1), a second capacitor (C2) having one end connected to the other end of the power supply (1), A third diode (D3) connected between the other end of the first capacitor (C1) and a terminal on the first switch (S1) side of the first reactor (L1); A fourth diode (D4) connected between the second switch (S2) side terminal of the second reactor (L2) and the other end of the second capacitor (C2); A diode (D3) and the first reactor (L
1) a fifth diode (Dx) connected in parallel to a circuit in which the second reactor (L2) and the fourth diode (D4) are connected in series; Dead switches of the first and second switches (S1, S2)
A switch control circuit for alternately controlling the ON state in a predetermined cycle with time, and wherein the first and second reactors (L1, L2) are electromagnetically coupled to each other. apparatus. 5. One or a plurality of switch circuits are connected between one end and the other end of the DC power supply, and the switch circuits apply a current in a first direction and a current in a second direction opposite to the load. In a bridge-type, half-bridge-type, or polyphase-bridge-type inverter device configured to flow a current, at least one of the switch circuits includes a series connection of a first switch (S1) and a first reactor (L1). A circuit, wherein the first switch (S1) is disposed at one end of the power supply (1) with respect to the first reactor (L1), and the first switch (S1) and the first reactor (L1) is connected between one end of the power supply (1) and one end of the load, and a series circuit of a second switch (S2) and a second reactor (L2). And the second switch A second switch (S2) is disposed on the other end side of the power supply (1) with respect to the second reactor (L2), and the second reactor (L2) and the second switch (S2) are connected to the load of the load. A second circuit connected between one end and the other end of the power supply (1); and a first diode (D) connected in parallel with the first circuit.
1) a series circuit of a third reactor (L1a) and a second diode connected in parallel to the second circuit.
A series circuit of (D2) and a fourth reactor (L2a); a first capacitor (C1) having one end connected to one end of the power supply (1); A second capacitor (C2) connected to the other end, between the other end of the first capacitor (C1) and a terminal on the first switch (S1) side of the first reactor (L1). A third diode (D3) connected to the second switch (S2) side terminal of the second reactor (L2) and the other end of the second capacitor (C2); A fourth diode (D4) and a fifth diode connected in parallel to a circuit in which the third diode (D3) and the first reactor (L1) are connected in series. (Dx1), the second reactor (L2) and the fourth diode (D4). ) And a sixth diode (Dx2) connected in parallel to a circuit connected in series with the first and second switches (S1, S2).
A switch control circuit that alternately controls the ON state at predetermined intervals with time, and wherein the first and fourth reactors (L1, L2a) are electromagnetically coupled to each other, and the second and third reactors are The reactors (L2, L1a) are electromagnetically coupled to each other, and the first and second diodes (D1, D2) are
For the first and second switches (S1, S2) respectively
An inverter device having the opposite direction . 6. One or more switch circuits are connected between one end and the other end of the DC power supply, and the switch circuits apply a current in a first direction and a current in a second direction opposite to the load to a load. In a bridge-type, half-bridge-type, or polyphase-bridge-type inverter device configured to flow a current, at least one of the switch circuits includes a series connection of a first switch (S1) and a first reactor (L1). A circuit, wherein the first switch (S1) is disposed at one end of the power supply (1) with respect to the first reactor (L1), and the first switch (S1) and the first reactor (L1) is connected between one end of the power supply (1) and one end of the load, and a series circuit of a second switch (S2) and a second reactor (L2). And the second switch A second switch (S2) is disposed on the other end side of the power supply (1) with respect to the second reactor (L2), and the second reactor (L2) and the second switch (S2) are connected to the load of the load. A second circuit connected between one end and the other end of the power supply (1); and a first diode ( D) connected in parallel with the first circuit.
1 ) and a third reactor ( L1a) in series with a second diode connected in parallel to the second circuit.
A series circuit of (D2) and a fourth reactor (L2a); a first capacitor (C1) having one end connected to one end of the power supply (1); A second capacitor (C2) connected to the other end, between the other end of the first capacitor (C1) and a terminal on the first switch (S1) side of the first reactor (L1). A third diode (D3) connected to the second switch (S2) side terminal of the second reactor (L2) and the other end of the second capacitor (C2); A fourth diode (D4), the third diode (D3), the first reactor (L1), the second reactor (L2), and the fourth diode (D4). A fifth diode (Dx) connected in parallel to a circuit connected in series Dead said first and second switches (S1, S2) ·
A switch control circuit that alternately controls the ON state at predetermined intervals with time, and wherein the first and fourth reactors (L1, L2a) are electromagnetically coupled to each other, and the second and third reactors are The reactors (L2, L1a) are electromagnetically coupled to each other, and the first and second diodes (D1, D2) are
For the first and second switches (S1, S2) respectively
An inverter device having the opposite direction . 7. One or more switch circuits are connected between one end and the other end of the DC power supply, and the switch circuits apply a current in a first direction and a current in a second direction opposite to the load to a load. In a bridge-type, half-bridge-type, or multi-phase bridge-type inverter device configured to flow a current, at least one of the switch circuits includes a series connection of a first reactor (L1) and a first switch (S1). A circuit, wherein the first reactor (L1) is disposed closer to one end of the power supply (1) than the first switch (S1), and the first reactor (L1) and the first switch (S1) is connected between one end of the power supply (1) and one end of the load, and a series circuit of a second reactor (L2) and a second switch (S2). Wherein the second reactor The second switch (S2) and the second reactor (L2) are connected to the load (L2) at the other end of the power supply (1) with respect to the second switch (S2). A second circuit connected between one end and the other end of the power supply (1); and a second circuit having a direction opposite to the first and second switches (S1, S2). First and second diodes (D1, D2) connected in parallel to first and second circuits, and one end of which is the first and second switches (S1, S2).
First capacitor (C1) connected to the interconnection point of
And one end thereof is connected to the first and second switches (S1, S2).
A second capacitor (C2) connected to the interconnection point of
A third diode (D3) connected between a terminal of the first reactor (L1) on the first switch (S1) side and the other end of the first capacitor (C1); A fourth diode (D4) connected between the other end of the second capacitor (S2) and a terminal on the second switch (S2) side of the second reactor (L2); A third diode (Dx1) connected in parallel to a circuit in which a third diode (D3) and the first reactor (L1) are connected in series; and a second reactor (L2) ) And a fourth diode (D4) connected in series with a circuit in which the fourth diode (D4) is connected in series; and a first and second switch (S1, S2). ) Dead
A switch control circuit that has a time and alternately turns on at a predetermined cycle. 8. One or more switch circuits are connected between one end and the other end of the DC power supply, and the switch circuits apply a current in a first direction and a current in a second direction opposite to the load. In a bridge-type, half-bridge-type, or polyphase-bridge-type inverter device configured to flow a current, at least one of the switch circuits includes a series connection of a first switch (S1) and a first reactor (L1). A circuit, wherein the first switch (S1) is disposed at one end of the power supply (1) with respect to the first reactor (L1), and the first switch (S1) and the first reactor (L1) is connected between one end of the power supply (1) and one end of the load, and a series circuit of a second switch (S2) and a second reactor (L2). And the second switch A second switch (S2) is disposed on the other end side of the power supply (1) with respect to the second reactor (L2), and the second reactor (L2) and the second switch (S2) are connected to the load of the load. A second circuit connected between one end and the other end of the power supply (1); and a second circuit having a direction opposite to the first and second switches (S1, S2). First and second diodes (D1, D2) connected in parallel to the first and second circuits; a first capacitor (C1) having one end connected to one end of the power supply (1); A second capacitor (C2) having one end connected to the other end of the power supply (1); the other end of the first capacitor (C1); and the first switch of the first reactor (L1). The first reactor (L1) is connected in parallel with the terminal on the (S1) side and is connected in parallel to the first reactor (L1). And the second reactor (L2) is connected between the second switch (S2) side terminal of the second reactor (L2) and the other end of the second capacitor (C2), and Reactor (L2)
Fourth diode (D4) connected in parallel to
And the first and second switches (S1, S2) are dead-locked.
A switch control circuit that has a time and alternately turns on in a predetermined cycle. 9. One or more switch circuits are connected between one end and the other end of the DC power supply, and the switch circuits apply a current in a first direction and a current in a second direction opposite to the load to a load. In a bridge-type, half-bridge-type, or multi-phase bridge-type inverter device configured to flow a current, at least one of the switch circuits includes a series connection of a first reactor (L1) and a first switch (S1). A circuit, wherein the first reactor (L1) is disposed closer to one end of the power supply (1) than the first switch (S1), and the first reactor (L1) and the first switch (S1) is connected between one end of the power supply (1) and one end of the load, and a series circuit of a second switch (S2) and a second reactor (L2). Wherein the second reactor The second switch (S2) and the second reactor (L2) are connected to the load (L2) at the other end of the power supply (1) with respect to the second switch (S2). A second circuit connected between one end and the other end of the power supply (1); and a second circuit having a direction opposite to the first and second switches (S1, S2). First and second diodes (D1, D2) connected in parallel to first and second circuits, and one end of which is the first and second switches (S1, S2).
First capacitor (C1) connected to the interconnection point of
And one end thereof is connected to the first and second switches (S1, S2).
A second capacitor (C2) connected to the interconnection point of
And a first reactor (L1) connected between a terminal on the first switch (S1) side of the first reactor (L1) and the other end of the first capacitor (C1).
And a third diode (D3) connected in parallel to the other end of the second capacitor (C2) and a terminal of the second reactor (L2) on the side of the second switch (S2). And a fourth diode (D4) connected to the second reactor (L2) in parallel with the first reactor and the second switch (S1, S2).
A switch control circuit that has a time and alternately turns on in a predetermined cycle.