JP3468260B2 - Bridge type inverter device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bridge type, half bridge type or multi-phase inverter device.

[0002]

2. Description of the Related Art When a switch of a bridge type inverter for converting direct current into alternating current is turned on and off, switching loss occurs. To solve this kind of problem, the partial resonance is used to switch the switch to ZCS (Zero Current Switching) or ZVS.
It has been proposed to reduce switching loss, surge voltage, and noise by (zero voltage switching). However, in the case of the method including the partial resonance switch, not only the circuit becomes complicated, but also power loss occurs.

Therefore, an object of the present invention is to provide a bridge type inverter device capable of reducing switching loss with a simple circuit.

[0004]

The invention according to claim 1 for achieving the above object will be described with reference to the reference numerals of the drawings showing an embodiment. One of the invention is provided between one end and the other end of a DC power supply. Alternatively, a plurality of switch circuits are connected, and the switch circuit connects the load with a current in a first direction and an opposite second current.
In a bridge type, half bridge type or multi-phase bridge type inverter device configured to flow a current in the direction of, at least one of the switch circuits is a series circuit of a first switch S1 and a first reactor L1. And the first switch S1 is connected to the first reactor L.
The first switch S1 and the first reactor L1 are arranged closer to one end side of the power source 1 than the power source 1.
Of a first circuit connected between one end of the load and one end of the load, and a series circuit of a second switch S2 and a second reactor L2, wherein the second switch S2 is the second circuit. Is arranged on the other end side of the power source 1 with respect to the reactor L2, and the second reactor L2 and the second switch S
2 has a second circuit connected between one end of the load and the other end of the power source 1, and has a direction opposite to that of the first and second switches S1 and S2. First and second diodes D connected in parallel to the first and second circuits
1, D2, a first capacitor C1 whose one end is connected to the interconnection middle point of the first and second reactors L1 and L2, and one end of which is the first and second reactor L
1, a second capacitor C2 connected to the middle point of mutual connection of L2, and a connection between the other end of the first capacitor C1 and a terminal of the first reactor L1 on the side of the first switch S1. A third diode D3, a fourth diode D4 connected between the second switch S2 side terminal of the second reactor L2 and the other end of the second capacitor C2, and A fifth diode D5 connected in parallel to a circuit in which the first capacitor C1, the second reactor L2 and the second switch S2 are connected in series, and the first switch S1. The first
Between a sixth diode D6 connected in parallel to a circuit in which the reactor L1 and the second capacitor C2 are connected in series, and the first capacitor C1 and the third diode D3. A third reactor L3 connected to the third reactor L4, and a fourth reactor L4 connected between the second capacitor C2 and the fourth diode D4.
And a seventh diode D7 connected in series to the third reactor L3 between the first capacitor C1 and the third diode D3, the second capacitor C2 and the fourth diode D7. Said diode D4 and said fourth
, An eighth diode D8 connected in series to the reactor L4, and one end of which is connected to one end of the power source 1 and the other end of which is between the third diode D3 and the seventh diode D7. Connected third capacitor C
3, a fourth capacitor C4 having one end connected to the other end of the power source 1 and the other end connected between the fourth diode D4 and the eighth diode D8; The present invention relates to an inverter device, comprising: a switch control circuit for alternately turning on the second switches S1 and S2 at a predetermined cycle with a dead time. As described in claim 2, the first
The first and second auxiliary resonance capacitors Ca and Cb can be connected in parallel to the first and second circuits. Further, as described in claim 3 or 4 or 5, first and second auxiliary diodes Da and Db can be provided. Moreover, as described in claims 6 and 7, the third and fourth capacitors C are provided.
Clamping diodes De and Df can be connected in parallel to 3, C4 or the first and second switches S1 and S2. Further, as described in claim 8, the first and second diodes D1 and D2 are connected to the first or second capacitor C1 and
Can be connected in parallel with C2. Further, as described in claim 9, the first and second reactors L1 and L2 are the first
Also, it can be connected to the power source side of the second switches S1 and S2. Further, as shown in claim 10, instead of the first and second reactors L1 and L2 in claim 1, one reactor La is provided as the first and second diodes D.
Midpoint of interconnection of 1, D2 and first and second switches S1
, S2 can be connected to the interconnection midpoint. Further, as described in claim 11, first and second auxiliary resonance capacitors Ca and Cb can be added to the circuit of claim 10. Further, as shown in claims 12, 13 and 14, auxiliary diodes Da and Db can be added. In addition, as described in claim 15, the third and fourth
Clamping diodes De and Df can be connected in parallel to the capacitors C3 and C4. In addition, claim 16
The first and second diodes D1 and D2 can be connected in parallel to the first and second capacitors C1 and C2, as shown in FIG. Further, as shown in claims 17 and 18, the first and second switching loss reducing capacitors Cx1 and Cx2 and the first and second capacitors are provided for the inverter devices of claims 1 to 9 and 10 to 16. , And the third and fourth switching loss reducing diodes Dx1, Dx2, Dx3, Dx4 can be added.

[0005]

According to the invention of each claim, the first
Also, ZVS is turned off when the second switches S1 and S2 are turned off, and ZCS is turned off when the switches are turned off, so that switching loss, surge voltage, and noise can be reduced. Further, the partial resonance operation can be obtained with a single power source having no midpoint potential, and the power source configuration is simplified. Further, according to the inventions of claims 2 and 11, energy can be supplied to the resonance circuit by the first and second auxiliary resonance capacitors Ca and Cb, and a stable resonance operation can be obtained. According to claims 3 to 7 and 11 to 14, the voltage can be limited by the added diode. According to the invention of claim 17, the first and second reactors L1 and
Since the first and second switching loss reducing capacitors Cx1 and Cx2 are connected in parallel to L2 via the diodes Dx1 and Dx2, the first and second auxiliary switches S1 and S2 are connected.
Immediately before turn-off of the first and second reactors L1 and L
The flow rate of the currents I1 and I2 flowing through 2 to the third and fourth capacitors C3 and C4 decreases. That is, a part of the current of the first and second reactors L1 and L2 is transferred to the first and second switching loss reducing capacitors Cx1 and Cx2 when the first and second auxiliary switches S1 and S2 are turned off. Shed. As a result, the first and second auxiliary switches S1
, S2 turn-off third and fourth capacitors C3
, C4 voltage Vc3, Vc4 rises slowly,
Also, the rise of the voltages of the second auxiliary switches S1 and S2 is delayed. Even if the first and second auxiliary switches S1 and S2 are controlled to be off, the currents Is1 and Is2 do not immediately become zero due to the storage action (carrier accumulation action) and continue to flow for a short time. The current flowing due to this storage action becomes a switching loss. The switching losses of the first and second auxiliary switches S1 and S2 are the product of the current flowing through them and this voltage. Therefore, as described above, when the voltage of the first and second auxiliary switches S1 and S2 decreases during turn-off, the switching loss here also decreases. Also in the invention of claim 18, since the first and second switching loss reducing capacitors Cx1 and Cx2 are provided for the same purpose as the invention of claim 17, the same effect as in claim 18 can be obtained. .

[0006]

[First Embodiment] Next, a bridge type inverter device according to a first embodiment of the present invention will be described with reference to FIGS.
As shown in FIG. 1, this inverter device is configured to convert a DC voltage of a DC power supply 1 into an AC by a bridge type inverter circuit and supply the AC to a load 2. The DC power supply 1 is composed of a rectifier circuit or a battery, and the load 2 is composed of, for example, an output transformer 3 connected to the load connection terminals 2a and 2b and a load circuit 4 connected to the output transformer 3.

The inverter circuit is composed of a combination of first and second switch circuits 5a and 5b having a half bridge structure. The first switch circuit 5a includes first and second switches S1 and S for forming a first arm of the bridge circuit.
In addition to having 2 and the first and second diodes D1, D2, in order to achieve ZVS or ZCS, first, second,
Third and fourth capacitors C1, C2, C3, C4,
First, second, third and fourth reactors L1, L2, L
3, L4, third, fourth, fifth, sixth, seventh and eighth diodes D3, D4, D5, D6, D7, D8, and first and second resistors R1 as a capacitor charging means. , R
2 and. The second switch circuit 5b includes third and fourth switches S3, S4 for forming a second arm of the bridge circuit, and ninth and tenth diodes D9, D.
In addition to having 10, fifth, sixth, seventh and eighth capacitors C5, C6, C7 to achieve ZVS, ZCS
, C8 and the fifth, sixth, seventh and eighth reactors L5
, L6, L7, L8, and first to sixteenth diodes D11 to D16.

A first circuit composed of a series circuit of a first switch S1 and a first reactor L1 is connected between one end of the power source 1 and the first load connection terminal 2a. A second circuit composed of a series circuit of a second reactor L2 and a second switch S2 is connected between the first load connection terminal 2a and the other end of the power source 1. First and second diodes D1 and D2 are connected in antiparallel to the first and second circuits.

One ends of the first and second capacitors C1 and C2 having the same capacitance are connected to the first and second reactors L1 and L1, respectively.
Each is connected to the middle point of interconnection of L2. The other end of the first capacitor C1 is connected to the terminal on the first switch S1 side of the first reactor L1 through the third reactor L3, the seventh diode D7 and the third diode D3, and The other end of the capacitor C2 is the fourth reactor L
It is connected to the terminal of the second reactor L2 on the second switch S2 side through the fourth diode D8, the eighth diode D8 and the fourth diode D4. The fifth diode D5 is connected between the terminal (emitter) on the power source 1 side of the second switch S2 and the other end (upper end) of the first capacitor C1. That is, the fifth diode D5 is connected in parallel to the series connection circuit of the first capacitor C1, the second reactor L2 and the second switch S2. The sixth diode D6 is connected between the other end (lower end) of the second capacitor C2 and the power switch 1 side terminal (collector) of the first switch S1. That is, the sixth diode D6 is connected to the first switch S1, the first reactor L1 and the second capacitor C1.
It is connected in parallel to the series connection circuit with 2. The charging resistors R1 and R2 are the fifth and sixth diodes D5,
It is connected in parallel with D6. One end of the third capacitor C3 is connected to the collector of the first switch S1 and the other end is connected to the interconnection middle point of the third and seventh diodes D3 and D7. One end of the fourth capacitor C4 is connected to the interconnection middle point of the fourth and eighth diodes D4 and D8, and the other end thereof is connected to the emitter of the second switch S2. The third and fourth capacitors C3
, C4 have the capacitances of the first and second capacitors C1 and C2.
The capacity may be the same or different.
In this embodiment, C3 and C4 have smaller capacities than C1 and C2. The inductance values of the reactors L3 and L4 may be the same as or different from those of L1 and L2. In this embodiment, L3 and L4 are L1 and L2.
Smaller than

The second switch circuit 5b is substantially the same circuit as the first switch circuit 5a, and the third switch S3 is provided between one end of the power source 1 and the second load connection terminal 2b.
And a fifth reactor L5 connected in series to a third circuit. Second load connection terminal 2b and power supply 1
A fourth circuit composed of a series circuit of a sixth reactor L6 and a fourth switch S4 is connected between the other end of the fourth circuit and the other end of the fourth circuit. One ends of the fifth and sixth capacitors C5 and C6 are the fifth
And the sixth reactors L5 and L6 are connected to the interconnection middle point. The other end of the fifth capacitor C5 is connected to the third switch S3 side terminal of the fifth reactor L5 via the seventh reactor L7, the fifteenth diode D15 and the eleventh diode D11, and The other end of the capacitor C6 is connected to the sixth reactor L6 through the eighth reactor L8, the sixteenth diode D16 and the twelfth diode D12.
Is connected to the terminal on the side of the fourth switch S4. First
The third diode D13 is connected between the lower terminal (emitter) of the fourth switch S4 and the other end (upper end) of the fifth capacitor C5. That is, the thirteenth diode D13
Is the fifth capacitor C5, the sixth reactor L6 and the fourth
The switch S4 is connected in parallel to the series connection circuit. The fourteenth diode D14 is connected between the other end (lower end) of the sixth capacitor C6 and the upper terminal (collector) of the third switch S3. That is, the fourteenth diode D14 is connected in parallel to the series connection circuit of the third switch S3, the fifth reactor L5 and the sixth capacitor C6. The charging resistors R3 and R4 are the first
The fifth and sixteenth diodes D15, D16 are connected in parallel. One end of the seventh capacitor C7 is connected to the collector of the third switch S3, the other end of which is connected to the eleventh and first
The three diodes D11 and D13 are connected to the interconnection middle point. Further, one end of the eighth capacitor C8 is connected to the interconnection middle point of the twelfth and sixteenth diodes D12 and D16, and the other end thereof is connected to the emitter of the fourth switch S4.

In FIG. 1, some of the connection lines between them are omitted for convenience of illustration, but the control terminals (bases) of the switches S1 to S4 are connected to the control circuit 6. As shown in principle in FIG. 2, the control circuit 6 includes the first, second and third control circuits.
And a fourth control pulse generation circuit 7, 8, 9, 10, an oscillator 11, and a phase control circuit 12. The first and second control pulse generation circuits 7 and 8 are controlled by the oscillator 11 to generate the first and second control pulses shown in FIGS. It supplies to the bases of the first and second switches S1 and S2. The third and fourth control pulse generation circuits 9 and 10 include an oscillator 11 and a phase control circuit 12.
Is controlled to generate the third and fourth control pulses shown in FIGS. 3 (C) and 3 (D), and these are generated by the third and fourth switches S.
3, supply to S4 base. The first and second control pulses and the third and fourth control pulses are the same except that they have a phase difference between them. The first and second control pulses in FIGS. 3A and 3B are alternately generated with a time gap (dead time) Ta therebetween, and the third and third control pulses in FIGS. Also, the fourth control pulse is generated alternately with a time gap Ta.

[0012]

[Operation] The basic operation of the inverter circuit of FIG. 1 is the same as that of a known inverter. That is, the power source 1, the first switch S1, the first reactor L1, the load 2, the sixth reactor L6, and the fourth switch S4 are included while the first and fourth switches S1 and S4 are simultaneously turned on. In the circuit, the current in the first direction flows to the load 2, and the second and third switches S
2, a circuit composed of the power source 1, the third switch S3, the fifth reactor L5, the load 2, the second reactor L2 and the second switch S2 while the S3 is turned on at the same time. Current flows.

Next, the operations of the first to fourth switches S1 to S4 during the turn-on and turn-off periods will be described. However, the operation during the turn-off period of the first switch S1 and the turn-on of the second switch S2, the operation during the turn-off period of the second switch S2 and the turn-on period of the first switch S1, and the operation of the third switch S3. Operation during turn-off and turn-off of the fourth switch S4,
Turning off the fourth switch S4 and turning on the third switch S4.
Since the operation during the turn-off period of 3 is substantially the same, the operation during the turn-off period of the first switch S1 and the turn-off period of the second switch S2 will be described in detail with reference to FIG. The description of the operation in other periods is omitted.

[0014]

[Capacitor charging operation] In this embodiment, for example, the first,
Fourth, sixth and seventh capacitors C1, C4, C6, C
It is necessary to precharge 7 in the direction shown in FIG.
In order to carry out this charging, the first and fourth switches S1 and S
Turn on 4. As a result, the charging current flows in the circuit of the first switch S1, the first reactor L1, the first capacitor C1 and the first resistor R1, and the first capacitor C1
Are charged to the power supply voltage V. Also, the first switch S1
With the circuit of the first and second reactors L1 and L2, the fourth diode D4 and the fourth capacitor C4, the fourth capacitor C4 is charged to the polarity shown in FIG. In addition, the fourth resistor R4, the sixth capacitor C6, and the sixth reactor L6
Then, a current also flows through the circuit of the fourth switch S4, and the sixth capacitor C6 is charged. Also, the seventh capacitor C
7 is also charged by the same circuit as C4. Of course, contrary to the above, the second, third, fifth and eighth capacitors C2, C3
, C5, C8 can be precharged. 1st to 4th
After the inverter operation by the switches S1 to S4 is started, the loss in resonance is replenished via the switches S1 to S4.

[0015]

[Turn-off and turn-on operation] FIG. 4 shows the state of each part in FIG. 1 when the load circuit 4 is unloaded and the load 2 is a delay load of only the transformer. First capacitor C
The first switch S1 is turned off at the time point t0 when 1 is charged to the power source voltage V, and the predetermined time t1
Then, when the second switch S2 is turned on, the energy of the first capacitor C1 is released by the resonance circuit composed of the first capacitor C1, the second reactor L2, the second switch S2 and the fifth diode D5. As a result, the voltage Vc1 of the first capacitor C1 becomes a sine wave 9 as shown in FIG.
The waveform decreases in the 0 to 180 degree section. At the same time, as a discharging circuit for the fourth capacitor C4, the fourth capacitor C4, the eighth diode D8, the fourth reactor L4, the second capacitor C2, the second reactor L2, and the second switch S2 are connected. A resonance circuit is formed, and the resonance current of this loop also flows. Since the resonance frequency of the resonance circuit of the fourth capacitor C4 is somewhat lower than that of the resonance circuit of the first capacitor C1, the voltage Vc4 of the fourth capacitor C4 is t2 as shown in FIG. 4 (F). A little later than t3, it becomes zero. Also, the second capacitor C2
Are charged as shown in FIG. The current I2 of the second reactor L2 flows as a sine wave from 0 to 90 degrees from the time t1 as shown in FIG. 4 (I). When the current I2 of the second reactor L2 reaches almost the peak value of the sine wave at time t2, the voltage of the second reactor L2 becomes 0V.
And the voltage Vc1 of the first capacitor C1 becomes zero, and the reverse bias of the second diode D2 is released,
The current I2 due to the release of the stored energy of the second reactor L2 is commutated to the second diode D2, and the second reactor L2, the second switch S2, and the second diode D2.
Flows as a circulating current through the closed circuit of. Since the voltage Vs1 of the first switch S1 gradually rises as shown in FIG.
ZVS of the second switch S2 is achieved because ZVS is achieved and the current of the second switch S2 is the same as the current I2 of the second reactor L2. Second diode D
While the 2 or second switch S2 is on, the fourth capacitor C4 is discharged and the second capacitor C2 is charged. However, when the voltage Vc2 of the second capacitor C2 becomes higher than the power supply voltage, the sixth diode D6 is turned on and the energy of the second and fourth reactors L2 and L4 is fed back to the power supply 1 or the load 2. Second after t3
It becomes possible to turn off the switch S2 and turn on the first switch S1. When the second switch S2 is turned off after t3 after t3, the fourth capacitor C4 is turned on.
Voltage Vc4 and the second auxiliary switch S shown in FIG.
Since the voltage Vs2 of 2 is zero, the second auxiliary switch S
2 becomes ZVS. When the second auxiliary switch S2 is turned off at t4, the current flowing there is commutated to the closed circuit of the second reactor L2, the fourth diode D4, the fourth capacitor C4 and the second diode D2, The fourth capacitor C4 is charged, and this voltage Vc4 rises in the waveform of the 0-90 degree section of the sine wave as shown in FIG. When the second switch S2 is turned off, the current I2 of the second reactor L2 is changed to the fourth capacitor C4.
Commutation to this voltage is gradually increased and ZVS of the second switch S2 is achieved. When the first switch S1 is turned on when the second switch S2 is turned off, a resonance circuit is formed by the second capacitor C2, the sixth diode D6, the first switch S1 and the first reactor L1. The current of the reactor L1 of 1 gradually rises,
ZCS of switch S1 is achieved.

This embodiment has the following effects. (1) ZVS is used when the switches S1 to S4 are turned off, and ZCS (zero current switch) is used when the switches S1 to S4 are turned on. Therefore, switching loss, surge voltage and noise can be reduced. Planned. (2) Since the snubber circuit has substantially no loss, efficiency improvement is achieved. (3) PWM control with a constant frequency is possible, and voltage control can be easily performed. (4) Partial resonance operation can be obtained with a single power source having no midpoint potential, and the configuration is simplified.

[0017]

Second Embodiment Next, a bridge type inverter device according to a second embodiment of the present invention will be described with reference to FIG.
However, FIG. 5 and FIGS. 6 to 10 and 12 to 17 described later.
In the embodiment, parts common to FIG. 1 or parts common to each other are designated by the same reference numerals and the description thereof will be omitted. The inverter circuit of FIG. 5 is obtained by adding four auxiliary resonance capacitors Ca, Cb, Cc and Cd to the inverter circuit of FIG. First and second auxiliary resonance capacitors Ca
, Cb are connected in parallel to the series circuit of the first and second switches S1 and S2 and the first and second reactors L1 and L2. The capacitors Cc and Cd are the third and fourth switches S3 and S4 and the fifth and sixth reactors L.
5 and L6 are connected in parallel to the series circuit. The configuration of the circuit of FIG. 5 is the same as that of FIG. 1 except for the above.

The first to fourth switches S1 to S4 of FIG. 5 are driven as shown in FIG. 3 similarly to those of FIG. Therefore, the basic operation of the inverter of the circuit of FIG. 5 is the same as that of FIG. By the way, in the circuit of FIG. 1, if the first, second, fifth and sixth capacitors C1, C2, C5
, C6 is insufficient to reach the power supply voltage V, the soft switching (ZVS or VCS) cannot be achieved well. Also, the first, second, fifth and sixth capacitors C1
, C2, C5, C6 are fully charged to the power supply voltage V, the voltage due to Ldi / dt is generated between the switches due to the inductance of the wiring of the switch circuit, and ZVS is generated.
It does not become. The first and second auxiliary resonance capacitors Ca to Cd in FIG. 5 are provided in order to solve the above-mentioned problem, and are equivalent to the first and second capacitors C1 and C2 during resonance operation. Are connected in parallel.

The first capacitor C1, the fourth capacitor C4, and the second auxiliary resonance capacitor Cb are charged to the power supply voltage V, the capacitor Ca is at zero volt, and the first switch S1 is turned off, and then the second switch S1 is turned off. Switch S
When 2 is turned on, the resonance current due to the discharge of the first capacitor C1 and the resonance current due to the discharge of the fourth capacitor C4 flow as in the circuit of FIG. At the same time, the second auxiliary resonance capacitor Cb, the second reactor L2 and the second
Resonance also occurs in the circuit composed of the switch S2. As a result, energy is supplied from the second auxiliary resonance capacitor Cb to the second reactor L2, and the energy shortage of the resonance circuit is compensated. This action and effect can be obtained based on the first auxiliary resonance capacitor Ca even when the second switch S2 is turned off and the first switch S1 is turned on. Incidentally, the first and second auxiliary resonance capacitors Ca,
Since Cb is directly connected between the terminals of the power source 1, it is reliably charged to the power source voltage V. Therefore, the resistors R1 to R4 can be disconnected from the circuit after the start of the inverter. In the circuit of FIG. 5, the operations of the capacitors Ca to Cd other than the auxiliary resonance are the same as those of the circuit of FIG. 1, and therefore, the same operational effect as the first embodiment is obtained.

[0020]

[Third Embodiment] In the inverter device of the third embodiment shown in FIG. 6, the first to fourth auxiliary diodes Da to D are added to the circuit of FIG.
The configuration is exactly the same as that of FIG. 1 except that d is added. The first auxiliary diode Da is connected between the interconnection middle point of the first reactor L1 and the third diode D3 and the other end (ground) of the power source 1, and the second auxiliary diode Db is connected to the second auxiliary diode Db. It is connected between the middle point of the interconnection of the reactor L2 and the fourth diode D4 and one end of the power supply 1. Third and fourth auxiliary diodes Dc, Dd
Is also connected in the same manner as Da and Db.

The diodes Da and Db are the third and fourth capacitors C3 and C4, and the first and second reactors L1 and L4.
This is a feedback diode for preventing the energy of L2 from being charged higher than the power supply voltage V. That is, if the third and fourth capacitors C3, C4 are going to be higher than the power supply voltage V, the first and second auxiliary diodes Da,
When Db is turned on, the first and second reactors L1 and L
The energy of 2 is returned to the power supply 1. In FIG. 6, the other components operate in the same manner as in FIG. 1, and therefore, the same operational effect is obtained.

Incidentally, the first and second auxiliary diodes Da
, Db can be changed as shown by the broken line in FIG. That is, in FIG. 6, the cathode of the first auxiliary diode Da is connected to the cathode of the seventh diode D7, and the anode of the second auxiliary diode Db is connected to the anode of the eighth diode D8, as in FIG. 13 described later. Or to connect the cathode of the first auxiliary diode Da to the anode of the seventh diode D7 and connect the anode of the second auxiliary diode D6 to the cathode of the eighth diode D8. It can be transformed. Even if the connection is changed in this way, the first and second auxiliary diodes D
a and Db are connected in series with the first and second reactors L1 and L2 to form a circuit for discharging the surplus energy.

[0023]

[Fourth Embodiment] An inverter device according to a fourth embodiment shown in FIG. 7 is obtained by adding first and second clamping diodes De and Df to the circuit of FIG. The first clamping diode De is connected to the third and seventh capacitors C3 and C.
The second clamp diode Df connected in parallel to 7
Is connected to the fourth and eighth capacitors C4 and C8.

First and second clamping diodes De
, Df, the third and fourth capacitors C3, C4 are discharged when a circulating current flows through the diodes D1, D2 of the first switch circuit 5a, and even if this voltage becomes zero, the reactor becomes The energy of L3 and L4 remains and the third and fourth capacitors C3 and C4 may be charged in the opposite direction. However, when the clamping diodes De and Df are provided as shown in FIG. 7, the energy of the reactors L3 and L4 is fed back to the power source and the voltages of C3 and C4 are clamped to zero.

The clamp diodes De and Df are connected to the first and second auxiliary switches S as shown by the dotted line in FIG.
1 and S2 can be connected in anti-parallel. In this case, the third and fourth capacitors C3 and C4 are connected to the third
And the clamping diodes De and Df are connected in parallel via the fourth diodes D3 and D4.

[0026]

[Fifth Embodiment] An inverter device according to a fifth embodiment of FIG. 8 has first and second diodes D1 and D2 connected in parallel to second and first capacitors C2 and C1, respectively. The configuration is similar to that of FIG. 1 except that the ninth and tenth diodes D9 and D10 are connected in parallel to the sixth and fifth capacitors C6 and C5. Even if the connection positions of the diodes D1, D2, D9 and D10 are changed as shown in FIG. 8, the same effect as the circuit of FIG. 1 can be obtained. Note that in FIG. 8, t of FIG.
2 and later, the current I2 of the second reactor L2 becomes L2-S2.
It flows in the closed circuit of -D5 -D2.

[0027]

[Sixth Embodiment] The inverter device of the sixth embodiment shown in FIG. 9 has a structure in which the first and second reactors L1 and L2 of the circuit of FIG.
L2 is moved and third and fourth capacitors C3, C
The configuration is the same as that of FIG. 1 except that the connection position of 4 is changed. In FIG. 9, the first reactor L1 is connected between one end of the power source 1 and the first switch S1, and the second reactor L1
Reactor L2 is connected between the second switch S2 and the other end of the power supply 1. One end of the third capacitor C3 is connected to the lower end of the first reactor L1 and the lower end of the fourth capacitor C4 is connected to the upper end of the second reactor L2.

The waveform of each part in FIG. 9 is the same as that in FIG.
Therefore, the same effect as the embodiment of FIG. 1 can be obtained by the embodiment of FIG.

[0029]

[Seventh Embodiment] Next, an inverter device according to a seventh embodiment will be described with reference to FIGS. In the inverter device of FIG. 10, the first and second reactors L1 of FIG.
One reactor La is provided instead of L2.
Reactor La is the first and second diodes D1 and D2.
Is connected between the middle point of interconnection of the first switch and the middle point of interconnection of the first and second switches S1 and S2. The midpoint of interconnection between the first and second capacitors C1 and C2 is connected to the midpoint of interconnection between the first and second diodes D1 and D2. The first and second switches S1 and S2 are connected in series with each other without a reactor. 10 is the same as that of FIG. 1 except for the above. This Figure 1
At 0, La, L3, and L4 are the first, second, and third reactors in claim 10. The second switch circuit 5b shown by a block is formed in the same manner as the first switch circuit 5a.

The first and second switches S1 and S of FIG.
2 is driven according to FIG. 3, similar to those of FIG.
The initial charging of the capacitors C1, C3 and C4 is performed in the same manner as in the first embodiment. FIG. 11 shows the waveform of each part in the same section as in FIG. The first, third and fourth capacitors C1,
When C3 and C4 are charged to the power supply voltage V, the first switch S1 is turned on and the second switch S2 is turned off, the first switch S1 is turned off at t0 in FIG. 11 and immediately after that, the first switch S1 is turned on. When the second switch S2 is turned on, the first
The energy of the capacitor C1 is C1, La, S2, D
It discharges in the resonant circuit consisting of 5. The energy of the fourth capacitor C4 is C4, D8, L4, C2, La,
It discharges in the resonance circuit of S2. In short, in the circuit of FIG. 10, a discharge circuit is formed by resonance of the first and fourth capacitors C1 and C4 through the common reactor La instead of the second reactor L2 of FIG. As a result,
Second, third and fourth capacitors C1, C2, C3, C
The voltages Vc1, Vc2, Vc3, and Vc4 of 4 are shown in FIG.
As shown in (D), (E), and (F), it changes similarly to FIG. 4, and the voltages Vs1 and V2 of the first and second switches S1 and S2 are changed.
As shown in FIGS. 11 (G) and 11 (H), s2 also changes in the same manner as in FIG. 4, and the current I1 of the reactor La also changes as shown in FIG. 11 (I). The direction of the current of the reactor La is opposite to that shown in FIG. 11 (I) when the first auxiliary switch S1 is on. When the current I1 of the reactor La reaches its peak, the voltage of the reactor La becomes zero, and the second diode D2 is turned on at the time t2. As a result, the reactor La, the second switch S2, and the second diode D2
A circulation circuit is formed. The second reactor L2 in FIG.
In FIG. 10, the electric current flows through the common reactor La, but the other operations are basically the same as those of the circuit of FIG. 1, so that the first and second switches S1 and S2 are
ZVS and ZCS are achieved, and the same effect as the first embodiment is obtained.

[0031]

[Eighth Embodiment] The circuit of FIG. 12 is obtained by adding the first and second auxiliary resonance capacitors Ca and Cb to the circuit of FIG. The first and second auxiliary resonance capacitors Ca and Cb of FIG. 9 are connected in parallel to the first and second diodes D1 and D2, and serve as a source of resonance energy as in the circuit of FIG. .

[0032]

[Ninth Embodiment] The circuit of FIG. 13 is obtained by adding the first and second auxiliary diodes Da and Db to the circuit of FIG. One end of the first auxiliary diode Da is connected to the other end (ground) of the power supply 1, and the other end is the seventh diode D7.
And a third capacitor C3. Second
Of the auxiliary diode Db is connected between the fourth capacitor C4 and the eighth diode D8, and the other end is connected to the power source 1
Is connected to one end of. The first and second auxiliary diodes Da and Db of FIG. 13 have the same operation and effect as those of the third embodiment shown in FIG. The connection points of the first and second auxiliary diodes Da and Db can be changed as shown by the dotted line in FIG. That is, in the dotted line, the cathode of the first auxiliary diode Da is connected to the anode of the seventh diode D7, and the anode of the second auxiliary diode Db is connected to the cathode of the eighth diode D8.

[0033]

[Tenth Embodiment] The circuit of FIG. 14 is obtained by adding first and second auxiliary diodes Da and Db to the circuit of FIG. The first and second auxiliary diodes Da and Db are connected in antiparallel to the first and second auxiliary switches S1 and S2. The first and second auxiliary diodes Da of FIG.
Db has a function of returning the surplus energy of the reactor La to the power source as in the third, ninth and tenth embodiments, and also has a clamping function like the diodes De and Df of FIG. In order to obtain the clamping action,
As indicated by the dotted line at 4, the first and second clamping diodes De and Df can be connected in parallel to the third and fourth capacitors C3 and C4 as in FIG.

[0034]

[Eleventh Embodiment] The circuit of FIG. 15 corresponds to the first circuit of the circuit of FIG.
And second diodes D1 and D2 are connected in parallel to the first and second capacitors C1 and C2 as in FIG. Even in this way, the current of the reactor La is
By circulating through the terminals D1 and D2, the same effect as that of the first embodiment can be obtained.

[0035]

[Twelfth Embodiment] The invertor of the twelfth embodiment shown in FIG.
The first and second reactors L1 are the same as those in FIG.
, L2 are connected to each other, and first and second diodes D1 and D2 are connected.
The second and first capacitors C2 and C1 as in FIG.
Are connected in parallel. In FIG. 16, the current of the second reactor L2 flows in the circuit of L2-D5-D2-S2. Therefore, the same effect as the circuit of FIG. 1 can be obtained.

[0036]

[Thirteenth Embodiment] A half-bridge type inverter device according to a thirteenth embodiment of FIG. 17 will be described below. The inverter device of FIG. 17 is provided with first and second conversion capacitors C11 and C12 instead of the second switch circuit 5b of the inverter device of FIG. Capacitors C11 and C
12 series circuits are connected between one end and the other end of the power supply 1,
The load 2 is connected to this interconnection midpoint. Since the switch circuit 5a of this half-bridge device is the same as that in FIG. 10, the same operational effect as that in FIG. 10 can be obtained.
Note that a half bridge circuit similar to that of FIG. 17 can be configured by using the switch circuit 5a of FIGS. 1, 5 to 9, and 11 to 16 to obtain the same effect.

[0037]

[Fourteenth Embodiment] The inverter device shown in FIG. 18 is different from the inverter device shown in FIG. 1 in that it includes first to fourth switching loss reducing capacitors Cx1 to Cx4 and first to eighth switching loss reducing diodes Dx1. .About.Dx8 are added, and the other components are the same as those in FIG. The first switching loss reducing capacitor Cx1 and the first switching loss reducing diode Dx1 are connected in series with each other, and the series circuit is connected in parallel with the first reactor L1. The second switching loss reducing capacitor Cx2 and the second switching loss reducing diode Dx2 are connected in series with each other, and this series circuit is connected to the second reactor L2.
Are connected in parallel. The anode of the third switching loss reducing diode Dx3 is the second auxiliary switch S2.
Is connected to the lower end, that is, the emitter, and the cathode is connected to the upper end of the first switching loss reducing capacitor Cx1. Therefore, the third switching loss reducing diode Dx3 is connected to the first switching loss reducing capacitor Cx1, the second reactor L2, and the second auxiliary switch S2.
And are connected in parallel to the circuits connected in series with each other. Fourth switching loss reduction diode Dx4
Is connected to the lower end of the second switching loss reducing capacitor Cx2, and its cathode is connected to the upper end of the first auxiliary switch S1 or collector. Therefore, the fourth switching loss reduction diode Dx4
Is connected in parallel to a circuit in which the second switching loss reducing capacitor Cx2, the first reactor L1 and the first auxiliary switch S1 are connected in series.
Since the second switch circuit 5b has the same configuration as the first switch circuit 5a, the series circuit of the capacitor Cx3 and the diode Dx5 is connected in parallel with the reactor L5, and the circuit of the capacitor Cx4 and the diode Dx6 is connected in parallel with the reactor L6. The diode Dx7 is connected in parallel to the circuit in which the capacitor Cx3, the reactor L6, and the auxiliary switch S4 are connected in series, and the diode Dx8 is connected to the capacitor Cx4, the reactor L5, and the auxiliary switch S3 in series. Connected in parallel to the connected circuit.

The basic operation of the inverter device of FIG. 18 is the same as that of the inverter device of FIG. FIG. 19 shows FIG.
The state of each part of 8 is shown similarly to FIG. 19 (A)-
(I) shows the state of the same part as (A)-(I) of FIG. 19 (J) and (K) are voltages Vcx1 and Vcx of the first and second switching loss reducing capacitors Cx1 and Cx2.
Indicates 2. When the second auxiliary switch S2 is turned on at t1 in FIG. 19, the charges accumulated in the first switching loss reducing capacitor Cx1 are transferred to the capacitor Cx1, the second reactor L2, the second auxiliary switch S2 and the third auxiliary switch S2.
Is discharged by the resonance circuit of the switching loss reducing diode Dx3, and the voltage Vcx1 of the capacitor Cx1 becomes zero at t2. In addition, also in FIG. 18, the second auxiliary switch S
At the time of turn-on of 2, C1-L2-S2-
A resonant circuit of D5 is also formed. After that, when the second auxiliary switch S2 is turned off at t4, L2-D4-C4-D
The circuit of 2 is formed in the same manner as the device of FIG.
-Dx2-Cx2 closed circuit is formed and capacitors C4, C
The voltages Vc4 and Vcx2 of x2 gradually increase toward the power supply voltage V as shown in FIGS. When the second switching loss reducing capacitor Cx2 of FIG. 18 is not provided as in the circuit of FIG. 1, the entire current I2 of the second reactor L2 is commutated to the fourth capacitor C4, and FIG.
The voltage Vc4 of the fourth capacitor C4 rises rapidly and the voltage of the second auxiliary switch S2 also rises in the section (F) from t4 to t5 as shown by the dotted line. On the other hand, FIG.
In the above device, a part of the current of the second reactor L2 is commutated to the second switching loss reducing capacitor Cx2, so that the rising speed of the voltage Vc4 of the fourth capacitor C4 is as shown in FIG.
It decreases as shown by the solid line from t4 to t5 of 9 (F). By the way, the second auxiliary switch S2 is a transistor, which has a function of accumulating carriers, and even if the second auxiliary switch S2 is turned off at t4 in FIG. 19, a current Is2 is generated in the section from t4 to t5 in FIG. The current continues to flow, causing power loss in the second auxiliary switch S2. The power loss in this second auxiliary switch S2 is the product of the current Is2 flowing through it and the voltage here, ie the voltage Vc4 of the fourth capacitor C4. t4 to t5
At, since the voltage Vc4 of the fourth capacitor C4 and the voltage of the second auxiliary switch S2 become low, the switching loss also becomes small. When the first, third and fourth auxiliary switches S1, S3 and S4 are turned off, the same operational effect as when the second auxiliary switch S2 is turned off can be obtained. Further, the capacitors Cx1 to Cx4 and the diodes Dx1 to Dx8 shown in FIG. 18 can be added to the inverter device shown in FIGS.

[0039]

[Fifteenth Embodiment] The inverter device shown in FIG. 20 is different from the inverter device shown in FIG. 10 in that the first and second switching loss reducing capacitors Cx1 and Cx2 and the first, second, third and fourth switching losses are added. Reduction diodes Dx1, Dx2,
The configuration is the same as that of FIG. 10 except that Dx3 and Dx4 are added. First switching loss reducing capacitor Cx1
And a first switching loss reducing diode Dx1 in a first series circuit, a second switching loss reducing capacitor Cx2 and a second switching loss reducing diode Dx1.
The second series circuit with x2 is connected in parallel to the common reactor La. However, the first and second switching loss reduction diodes Dx1 and Dx2 are connected in opposite polarities. The third switching loss reducing diode Dx3 is connected between the emitter of the second auxiliary switch S2 and one terminal of the first switching loss reducing capacitor Cx1. After all, the diode Dx3 is connected in parallel to the series circuit of the first switching loss reducing capacitor Cx1 and the common reactor La and the second auxiliary switch S2. The fourth switching loss reducing diode Dx4 is connected between one end of the second switching loss reducing capacitor Cx2 and the collector of the first auxiliary switch S1. After all, this diode D
x4 is connected in parallel to the series circuit of the reactor La which is common to the first auxiliary switch S1 and the second switching loss reducing capacitor Cx2.

The basic operation of the inverter device of FIG. 20 is the same as that of the inverter device of FIG. 21 shows the state of each part of FIG. 20 similarly to FIG. 21 (A) to (I) show the states of the same locations as in (A) to (I) of FIG. 21 (J) and (K) are voltages Vcx of the first and second switching loss reduction capacitors Cx1 and Cx2.
1, Vcx2 is shown. When the second auxiliary switch S2 is turned on at t1 in FIG. 23, the charge accumulated in the first switching loss reducing capacitor Cx1 is shared by the capacitor Cx1, the common reactor La and the second auxiliary switch S2.
And the third switching loss reduction diode Dx3 releases the resonant circuit, and the voltage Vcx1 of the capacitor Cx1 is t.
It becomes zero at 2. It should be noted that, in FIG. 20 as well, when the second auxiliary switch S2 is turned on, as in the case of FIG.
A resonant circuit of -S2-D5 is also formed. After that, when the second auxiliary switch S2 is turned off at t4, La-D4-
A C4-D2 circuit is formed in the same manner as in the device of FIG. 10, and a closed circuit of La-Dx2-Cx2 is formed, and the voltages Vc4 and Vcx2 of the capacitors C4 and Cx2 are shown in FIG.
As shown in (K), it gradually increases toward the power supply voltage V. When the second switching loss reducing capacitor Cx2 of FIG. 22 is not provided as in the circuit of FIG. 10, all of the current I2 of the common reactor La is commutated to the fourth capacitor C4, and as shown in FIG. The voltage Vc4 of the fourth capacitor C4 rises rapidly as shown by the dotted line in the section from t4 to t5,
The voltage of the second auxiliary switch S2 likewise rises. On the other hand, in the device of FIG. 20, a part of the current of the common reactor La is commutated to the second switching loss reducing capacitor Cx2, so that the rising speed of the voltage Vc4 of the fourth capacitor C4 is shown in FIG. 21 (F). It falls as shown by the solid line from t4 to t5. By the way, the second auxiliary switch S2 is a transistor and has a function of accumulating carriers,
Even if it is controlled to be off by, the current Is2 continues to flow as shown by the dotted line in the section from t4 to t5 of FIG. This second auxiliary switch S
The power loss at 2 is the product of the current Is2 flowing here and the voltage here, ie the voltage Vc4 of the fourth capacitor C4. t
From 4 to t5, the voltage Vc4 of the fourth capacitor C4 and the voltage of the second auxiliary switch S2 become low, so that the switching loss also becomes small. Even when the first auxiliary switch S1 is turned off, the second auxiliary switch S1 is turned off.
The same effect as when turning off 2 is obtained. Also,
Capacitors Cx1 and Cx2 and diodes Dx1 to Dx4 of FIG.
Can be added to the inverter device of FIGS. 12 to 15 and FIG.

[0041]

[Sixteenth Embodiment] The inverter device shown in FIG. 22 is a switching loss reducing diode Dx1, Dx2, Dx5, D.
It is formed in the same manner as in FIG. 18 except that the connection portion of x6 is changed. In FIG. 22, the cathodes of the first and fifth switching loss reducing diodes Dx1 and Dx5 are connected to the nodes of the third and eleventh diodes D3 and D11.
Second and sixth switching loss reducing diodes Dx
2. The node of Dx6 is the fourth and twelfth diode D4.
, D12 connected to the cathode. Even if the connection is changed in this way, the circuit of FIG. 22 operates substantially the same as the circuit of FIG. 18, and the same effect can be obtained. The first and second switching loss reducing diodes Dx1,
It is also possible to change the connection of either one of Dx2 or only one of the diodes Dx5 and Dx6 as shown in FIG.

[0042]

[17th Embodiment] The inverter device shown in FIG.
8th, 4th, 11th and 12th diodes D3,
It is the same as that shown in FIG. 18 except that the connection points of D4, D11 and D12 are changed. In FIG. 23, the cathodes of the third and eleventh diodes D3 and D11 are connected to the anodes of the first and fifth switching loss reducing diodes Dx1 and Dx5, and the fourth and twelfth diodes are connected. The nodes D4 and D12 are the second and sixth switching loss reducing diodes.
It is connected to the terminals Dx2 and Dx6. The circuit of FIG. 23 performs substantially the same operation as the circuit of FIG. 18, and can obtain the same effect. In FIG. 23, either one of the diodes D3 and D4 or the diodes D11 and D4 is used.
Only one of the 12 can be connected as shown in FIG. 23 and the other can be connected as shown in FIG.

[0043]

[Eighteenth Embodiment] The inverter device shown in FIG. 24 is a diode Dx for reducing the first and second switching losses shown in FIG.
It is formed in the same manner as in FIG. 20 except that the connection points of 1 and Dx2 are changed. In FIG. 24, the cathode of the first switching loss reducing diode Dx1 is connected to the node of the third diode D3, and the second switching loss reducing diode D2 is connected. It is connected to the cathode of the fourth diode D4. The circuit of FIG. 24 performs substantially the same operation as the circuit of FIG. 20, and can obtain the same effect. It is also possible to connect only one of the first and second switching loss reducing diodes Dx1 and Dx2 as shown in FIG. 24 and the other as shown in FIG.

[0044]

[Nineteenth Embodiment] The inverter device of FIG. 25 is the same as that of FIG. 20 except that the connection points of the third and fourth diodes D3 and D4 of FIG. 20 are changed. In FIG. 25, the cathode of the third diode D3 is connected to the anode of the first switching loss reducing diode Dx1, and the fourth diode
The anode of the diode D4 is connected to the cathode of the second switching loss reducing diode Dx2. The circuit of FIG. 25 performs substantially the same operation as the circuit of FIG. 20, and can obtain the same effect. Note that either one of the third and fourth diodes D3 and D4 of FIG. 25 can be connected as shown in FIG. 25, and the other can be connected as shown in FIG.

[0045]

MODIFICATION The present invention is not limited to the above-mentioned embodiments, and the following modifications are possible. (1) It is possible to configure a three-phase or multi-phase bridge type inverter device by preparing three or a large number of ones corresponding to the first switch circuit 5a in each embodiment and connecting three-phase or multi-phase. . (2) The switches S1 to S4 can be semiconductor switches such as field effect transistors. Moreover, these can be made into the anti-parallel diode built-in element. (3) In each of the embodiments of FIGS. 1 to 9, connecting a backflow preventing diode in series to the first and second reactors L1 and L2, and in the embodiments of FIGS. 10 to 17, the reactor La and the switch. A backflow blocking diode can be connected between S1 and S2. (4) In each embodiment, the charging resistors R1 to R4 can be omitted and the initial charging of each capacitor can be performed by an independent charging circuit. Further, the charging resistors R1 to R4 can be replaced with switches to selectively flow the charging current.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an inverter device of a first embodiment.

FIG. 2 is a block diagram showing a control circuit of FIG.

FIG. 3 is a waveform diagram of each part of FIG.

FIG. 4 is a waveform diagram of each part of FIG.

FIG. 5 is a circuit diagram of an inverter device according to a second embodiment.

FIG. 6 is a circuit diagram of an inverter device according to a third embodiment.

FIG. 7 is a circuit diagram of an inverter device according to a fourth embodiment.

FIG. 8 is a circuit diagram of an inverter device according to a fifth embodiment.

FIG. 9 is a circuit diagram of an inverter device according to a sixth embodiment.

FIG. 10 is a circuit diagram of an inverter device according to a seventh embodiment.

11 is a waveform chart of each part of FIG.

FIG. 12 is a circuit diagram of an inverter device according to an eighth embodiment.

FIG. 13 is a circuit diagram of an inverter device according to a ninth embodiment.

FIG. 14 is a circuit diagram of an inverter device according to a tenth embodiment.

FIG. 15 is a circuit diagram of an inverter device according to an eleventh embodiment.

FIG. 16 is a circuit diagram of an inverter device according to a twelfth embodiment.

FIG. 17 is a circuit diagram of an inverter device according to a thirteenth embodiment.

FIG. 18 is a circuit diagram showing an inverter device of a fourteenth embodiment.

FIG. 19 is a waveform diagram showing a state of each part of FIG.

FIG. 20 is a circuit diagram showing an inverter device of a fifteenth embodiment.

21 is a waveform chart showing a state of each part of FIG. 20. FIG.

FIG. 22 is a circuit diagram showing an inverter device of a sixteenth embodiment.

FIG. 23 is a circuit diagram showing an inverter device according to a 17th embodiment.

FIG. 24 is a circuit diagram showing an inverter device of the eighteenth embodiment.

FIG. 25 is a circuit diagram showing an inverter device according to a 19th embodiment.

[Explanation of symbols]

S1 to S4 switches L1 ~ L4 reactor

Claims (18)

(57) [Claims] 1. One or a plurality of switch circuits are connected between one end and the other end of a DC power supply, and the switch circuit connects a load with a current in a first direction and a second direction opposite thereto. In a bridge type, half-bridge type or multi-phase bridge type inverter device configured to pass an electric current, at least one of the switch circuits comprises a first switch (S1) and a first reactor (L1) in series. A circuit, wherein the first switch (S1) is arranged closer to one end of the power source (1) than the first reactor (L1), and the first switch (S1) and the first reactor are connected. (L1) is connected between one end of the power source (1) and one end of the load, and a series circuit of a second switch (S2) and a second reactor (L2). And the second switch Is located closer to the other end of the power supply (1) than the second reactor (L2), and the second reactor (L2) and the second switch (S2) are connected to the load. A second circuit connected between one end and the other end of the power supply (1), and the second circuit having the opposite directivity to the first and second switches (S1, S2). First and second diodes (D1, D2) connected in parallel to the first and second circuits, and one end of the first and second reactors (L1, L2).
) The first capacitor (C1
), And one end thereof has the first and second reactors (L1, L2).
A second capacitor (C2
), And a third diode (D3) connected between the other end of the first capacitor (C1) and a terminal of the first reactor (L1) on the first switch (S1) side. A fourth diode (D4) connected between the second switch (S2) side terminal of the second reactor (L2) and the other end of the second capacitor (C2), A fifth diode (D5) connected in parallel to a circuit in which the first capacitor (C1), the second reactor (L2) and the second switch (S2) are connected in series; , A sixth diode (D6) connected in parallel to a circuit in which the first switch (S1), the first reactor (L1) and the second capacitor (C2) are connected in series. ), The first capacitor (C1) and the third die Third reactor that is connected between the over-de (D3) (L3)
And a fourth reactor (L4) connected between the second capacitor (C2) and the fourth diode (D4).
And a seventh diode (D7) connected in series with the third reactor (L3) between the first capacitor (C1) and the third diode (D3), An eighth diode (D8) connected in series to the fourth reactor (L4) between the second capacitor (C2) and the fourth diode (D4), and one end of which is connected to the power source ( 3) a third capacitor (C3) connected to one end of 1) and the other end connected between the third diode (D3) and the seventh diode (D7)
) And a fourth capacitor (one end of which is connected to the other end of the power source (1) and the other end of which is connected between the fourth diode (D4) and the eighth diode (D8)). C4
) And dead the first and second switches (S1, S2).
An inverter device, comprising: a switch control circuit that alternately turns on in a predetermined cycle with time. 2. A first and a second auxiliary resonance capacitors (Ca) connected in parallel to the first and second circuits.
, Cb). 3. Further, one end thereof is connected to the other end of the power source (1) and the other end thereof is connected to an interconnection point between the first switch (S1) and the first reactor (L1). And a first auxiliary diode (Da), one end of which is the second reactor (L2) and the second switch (S2).
) Of the second auxiliary diode (Db), the other end of which is connected to one end of the power supply (1).
) And an inverter device according to claim 1 or 2. 4. Further, one end thereof is connected to the other end of the power source (1), and the other end thereof is the third capacitor (C3).
And a seventh auxiliary diode (D7) connected between the first auxiliary diode (Da) and one end between the fourth capacitor (C4) and the eighth diode (D8). Inverter device according to claim 1 or 2, characterized in that it has a second auxiliary diode (Db) which is connected and whose other end is connected to one end of the power supply (1). 5. Further, one end thereof is connected to the other end of the power source (1), and the other end thereof is the third reactor (L3).
And a seventh auxiliary diode (D7) connected between the first auxiliary diode (Da) and one end of the first auxiliary diode (Da) between the fourth reactor (L4) and the eighth diode (D8). Inverter device according to claim 1 or 2, characterized in that it has a second auxiliary diode (Db) which is connected and whose other end is connected to one end of the power supply (1). 6. Further comprising first and second clamping diodes (De, Df) connected in parallel to said third and fourth capacitors (C3, C4). An inverter device according to item 1 or 2 or 3 or 4 or 5. 7. The first and second switches (S)
Inverter device according to claim 1, 2 or 3 or 4 or 5, characterized in that it comprises first and second clamping diodes (De, Df) connected in anti-parallel to 1, 1, S2). 8. The inverter device according to claim 1, wherein the connection locations of the first and second diodes (D1, D2) are parallel to the second and first capacitors (C2, C1). An inverter device characterized in that the connection is changed so that 9. The inverter device according to claim 1, wherein the first reactor (L1) is connected between one end of the DC power supply (1) and the first switch (S1). , Connecting the second reactor (L2) between the first switch (S2) and the other end of the DC power supply (1), and connecting one end of the third capacitor (C3) to the first Reactor (L1) and the first switch (S1)
) And the fourth capacitor (C4
) Is connected to the connection point of the second switch (S2) and the second reactor (L2). 10. One or a plurality of switch circuits are connected between one end and the other end of the DC power supply, and the switch circuits connect a load with a current in a first direction and a current in a second direction opposite thereto. In a bridge type, half-bridge type or multi-phase bridge type inverter device configured to flow current, at least one of the switch circuits is connected between one end and the other end of the power supply (1). A series circuit of first and second switches (S1, S2) and a series circuit between one end and the other end of the DC power supply (1), and the first and second switches (S1, S2) First and second diodes (D1, D2) having opposite directions and having an interconnection midpoint connected to one end of the load
And a first point connected between the interconnection midpoint of the first and second diodes (D1, D2) and the interconnection midpoint of the first and second switches (S1, S2). Reactor (L
a) and one end thereof has the first and second diodes (D1, D2).
) The first capacitor (C1
), And one end thereof has the first and second diodes (D1, D2).
A second capacitor (C2
), A third diode (D3) connected between the other end of the first capacitor (C1) and the interconnection middle point of the first and second switches (S1, S2), A fourth diode (D4) connected between the interconnection middle point of the first and second switches (S1, S2) and the other end of the second capacitor (C2); and the first capacitor. A first diode (D5) connected in parallel to a circuit in which (C1), the first reactor (La) and the second switch (S2) are connected in series; A switch (S1), a first reactor (La) and a second capacitor (C2) connected in series to a sixth diode (D6) connected in parallel to the circuit, Between the first capacitor (C1) and the third diode (D3) Connected second reactor (L3)
And a third reactor (L4) connected between the second capacitor (C2) and the fourth diode (D4).
A seventh diode (D7) connected in series with the second reactor (L3) between the first capacitor (C1) and the third diode (D3); An eighth diode (D8) connected in series to the third reactor (L4) between the second capacitor (C2) and the fourth diode (D4), and one end of which is connected to the power source ( 3) a third capacitor (C3) connected to one end of 1) and the other end connected between the third diode (D3) and the seventh diode (D7)
) And a fourth capacitor (one end of which is connected to the other end of the power source (1) and the other end of which is connected between the fourth diode (D4) and the eighth diode (D8)). C4
) And dead the first and second switches (S1, S2).
An inverter device, comprising: a switch control circuit that alternately turns on in a predetermined cycle with time. 11. Further comprising first and second auxiliary resonance capacitors (Ca, Cb) connected in parallel to the first and second diodes (D1, D2). Inverter device according to claim 10, characterized in that 12. Further, one end thereof is connected to the other end of the power source (1) and the other end thereof is connected to the third capacitor (C3).
) And the seventh diode (D7), and a first auxiliary diode (Da) connected between the fourth capacitor (C4) and the eighth diode (D8).
) And a second auxiliary diode (Db) connected to the other end of the power supply (1), the inverter device according to claim 10 or 11. 13. Further, one end thereof is connected to the other end of the power source (1), and the other end thereof is connected to the second reactor (L3).
) And the seventh diode (D7), and a first auxiliary diode (Da) connected between the third reactor (L4) and the eighth diode (D8).
Inverter device according to claim 10 or 11, characterized in that it has a second auxiliary diode (Db) connected to the other end and to the other end of the power supply (1). 14. Further comprising first and second auxiliary diodes (Da, Db) connected in parallel to said first and second switches (S1, S2). Inverter device according to 10 or 11. 15. Further comprising first and second clamping diodes (De, Df) connected in anti-parallel to said third and fourth capacitors (C3, C4). An inverter device according to claim 10 or 11. 16. The inverter device according to claim 10, wherein the connection locations of the first and second diodes (D1, D2) are set to the first and second capacitors (C1, C2).
An inverter device characterized in that the connection is changed so as to be in parallel with. 17. The first reactor connected in parallel to the first reactor (L1).
And a series circuit of the switching loss reducing capacitor (Cx1) and the first switching loss reducing diode (Dx1), and a second circuit connected in parallel to the second reactor (L2).
Series circuit of the switching loss reducing capacitor (Cx2) and the second switching loss reducing diode (Dx2), and the first switching loss reducing capacitor (Cx1)
And a third switching loss reducing diode (Dx3) connected in parallel to a circuit in which the second reactor (L2) and the second auxiliary switch (S2) are connected in series, The second switching loss reducing capacitor (Cx2)
And a fourth switching loss reducing diode (Dx4) connected in parallel to a circuit in which the first reactor (L1) and the first auxiliary switch (S1) are connected in series with each other. The inverter device according to any one of claims 1 to 9, further comprising: an inverter device. 18. Further, a first reactor connected in parallel with the first reactor (La).
A series circuit of a switching loss reducing capacitor (Cx1) and a first switching loss reducing diode (Dx1), and a second circuit connected in parallel to the first reactor (La).
A series circuit of a switching loss reducing capacitor (Cx2) and a second switching loss reducing diode (Dx2) having a polarity opposite to that of the first switching loss reducing diode (Dx1), and the first switching Loss reduction capacitor (Cx1)
And a third switching loss reducing diode (Dx3) connected in parallel to a circuit in which the first reactor (La) and the second auxiliary switch (S2) are connected in series with each other, The second switching loss reducing capacitor (Cx2)
And a fourth switching loss reducing diode (Dx4) connected in parallel to a circuit in which the first reactor (La) and the first auxiliary switch (S1) are connected in series with each other. The inverter device according to claim 10, wherein the inverter device is provided.