JPS63307566A - チャネル装置 - Google Patents

チャネル装置

Info

Publication number
JPS63307566A
JPS63307566A JP14232287A JP14232287A JPS63307566A JP S63307566 A JPS63307566 A JP S63307566A JP 14232287 A JP14232287 A JP 14232287A JP 14232287 A JP14232287 A JP 14232287A JP S63307566 A JPS63307566 A JP S63307566A
Authority
JP
Japan
Prior art keywords
microprogram
control circuit
microprocessor
data transfer
microprograms
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14232287A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0525335B2 (cs
Inventor
Masao Koyabu
小藪　正夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP14232287A priority Critical patent/JPS63307566A/ja
Publication of JPS63307566A publication Critical patent/JPS63307566A/ja
Publication of JPH0525335B2 publication Critical patent/JPH0525335B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
JP14232287A 1987-06-09 1987-06-09 チャネル装置 Granted JPS63307566A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14232287A JPS63307566A (ja) 1987-06-09 1987-06-09 チャネル装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14232287A JPS63307566A (ja) 1987-06-09 1987-06-09 チャネル装置

Publications (2)

Publication Number Publication Date
JPS63307566A true JPS63307566A (ja) 1988-12-15
JPH0525335B2 JPH0525335B2 (cs) 1993-04-12

Family

ID=15312656

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14232287A Granted JPS63307566A (ja) 1987-06-09 1987-06-09 チャネル装置

Country Status (1)

Country Link
JP (1) JPS63307566A (cs)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5624630A (en) * 1979-08-06 1981-03-09 Fujitsu Ltd Plural input and output device control system
JPS60122450A (ja) * 1983-12-05 1985-06-29 Hitachi Ltd マイクロ・プロセッサ

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5624630A (en) * 1979-08-06 1981-03-09 Fujitsu Ltd Plural input and output device control system
JPS60122450A (ja) * 1983-12-05 1985-06-29 Hitachi Ltd マイクロ・プロセッサ

Also Published As

Publication number Publication date
JPH0525335B2 (cs) 1993-04-12

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees