JPS63284591A - 表示パネルモジュ−ル - Google Patents
表示パネルモジュ−ルInfo
- Publication number
- JPS63284591A JPS63284591A JP62119420A JP11942087A JPS63284591A JP S63284591 A JPS63284591 A JP S63284591A JP 62119420 A JP62119420 A JP 62119420A JP 11942087 A JP11942087 A JP 11942087A JP S63284591 A JPS63284591 A JP S63284591A
- Authority
- JP
- Japan
- Prior art keywords
- conductive layer
- display panel
- powder
- chip
- panel module
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Wire Bonding (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62119420A JPS63284591A (ja) | 1987-05-15 | 1987-05-15 | 表示パネルモジュ−ル |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62119420A JPS63284591A (ja) | 1987-05-15 | 1987-05-15 | 表示パネルモジュ−ル |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63284591A true JPS63284591A (ja) | 1988-11-21 |
| JPH0512712B2 JPH0512712B2 (cg-RX-API-DMAC7.html) | 1993-02-18 |
Family
ID=14761018
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62119420A Granted JPS63284591A (ja) | 1987-05-15 | 1987-05-15 | 表示パネルモジュ−ル |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63284591A (cg-RX-API-DMAC7.html) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0389321A (ja) * | 1989-09-01 | 1991-04-15 | Semiconductor Energy Lab Co Ltd | 液晶電気光学装置とその作製方法 |
| US6404476B1 (en) | 1989-09-01 | 2002-06-11 | Semiconductor Energy Laboratory Co., Ltd. | Device having an improved connective structure between two electrodes |
-
1987
- 1987-05-15 JP JP62119420A patent/JPS63284591A/ja active Granted
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0389321A (ja) * | 1989-09-01 | 1991-04-15 | Semiconductor Energy Lab Co Ltd | 液晶電気光学装置とその作製方法 |
| US6404476B1 (en) | 1989-09-01 | 2002-06-11 | Semiconductor Energy Laboratory Co., Ltd. | Device having an improved connective structure between two electrodes |
| US6956635B2 (en) | 1989-09-01 | 2005-10-18 | Semiconductor Energy Laboratory Co., Ltd. | Liquid crystal device and manufacturing method therefor |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0512712B2 (cg-RX-API-DMAC7.html) | 1993-02-18 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |