JPS6325769Y2 - - Google Patents

Description

[Detailed description of the invention] The present invention relates to a differential amplifier output circuit suitable for use in gain control circuits, etc., which operates particularly well and ensures that the output signal is not affected by fluctuations in power supply voltage. be.

2. Description of the Related Art Conventionally, a differential amplifier output circuit as shown in FIG. 1 has been proposed as a differential amplifier output circuit that can be used in a gain control circuit and performs well. That is, in FIG. 1, 1 and 2 respectively indicate npn type transistors constituting a differential amplifier, and the respective emitters of transistors 1 and 2 are connected through a series circuit of resistors 3 and 4. A connection point between resistors 3 and 4 is grounded via a constant current source 5. Further, the bases of transistors 1 and 2 are connected to a bias voltage source 8 through resistors 6 and 7, respectively, and the base of transistor 1 is grounded through a series circuit of a capacitor 9 and an input signal source 10. A diode 11 is inserted in the collector current path of transistor 1, that is, between the collector of transistor 1 and the power supply terminal 12 to which positive DC voltage +Vcc is supplied, and in the collector current path of transistor 2, that is, between the collector of transistor 2 and the power supply. A collector-emitter path of a pnp transistor 13 is inserted between the terminal 12 and the collector-emitter path of the transistor 13, and the connection point between the collector of the transistor 1 and the diode 11 is connected to the base of the transistor 13. An output terminal 14 is derived from the connection point, and this output terminal 14 is connected to the power supply terminal 12 via a bias setting resistor 15, and this output terminal 14 is grounded via a bias setting resistor 16. . In this case, diode 11 and transistor 13 constitute a current mirror circuit. Therefore, (I ₁ −i ₁ ) and (I ₁ +i ₁ ) for transistors 1 and 2 as shown in the figure.
If the collector current flows (i ₁ represents the current change due to the input signal, and 2I ₁ is the current of the constant current source 5), the diode 11 and the transistor 13 constitute a current mirror circuit, so the transistor A current of (I ₁ −i ₁ ) flows through the collector of 13, so that an output current of 2i ₁ is obtained at the output terminal 14.

However, in the output circuit of the differential amplifier as shown in FIG. 1, the bias voltage at the output terminal 14 is determined by the bias setting resistors 15 and 16, so
There was a drawback that when there was a voltage fluctuation such as a ripple in Vcc, this fluctuation affected the output signal. FIG. 2 shows an example in which the output circuit of the differential amplifier shown in FIG. 1 is used as a gain control circuit. That is, the collectors of transistors 1 and 2 are each connected to a common bias voltage source 17 at the base of an npn transistor 1.
The transistor 1 is connected to the power supply terminal 12 through the collector-emitter paths of transistors 8 and 19.
and 2 are connected to the respective bases of npn transistors 20 and 21 constituting a differential amplifier, respectively, and the connection point of the emitters of these transistors 20 and 21 is connected via a constant current source 22. The collector of the transistor 20 is connected to the power supply terminal 12 through the diode 11, the collector of the transistor 21 is connected to the power supply terminal 12 through the collector-emitter path of the transistor 13, and the base of the transistor 13 is connected to the power supply terminal 12 through the collector-emitter path of the transistor 13. The output terminal 14 is connected to the connection point between the collectors of the diode 11 and the transistor 20, and the output terminal 14 is led out from the connection point between the collectors of the transistors 13 and 21. The output terminal 14 is connected to the power supply terminal 12 and grounded via a bias setting resistor 16.

In this case diode 11 and transistor 13
constitutes a current mirror circuit as in FIG. Therefore, input signal source 10 causes transistor 1
Collector currents of (I ₁ −i ₁ ) and (I ₁ +i ₁ ) flow through transistors 20 and 2, which causes transistors 20 and 2 to
When the collector currents of (I ₂ −i ₂ ) and (I ₂ +i ₂ ) flow through 1, an output current of 2i ₂ is obtained. Here, i ₂ is the amount of current change due to the input signal, and 2I ₂ is the current of the constant current source 22. In addition, in the gain control circuit as shown in FIG. 2, the input signal voltage is v _i , the output signal voltage is v _p , and the emitter resistance of each of transistors 1 and 2 is
Let r _e , and let the resistance values of resistors 3 and 4 be R _E ,
When the load is R _L , the gain G is G=|v _p /v _i |=R _L /R _E + _re ·I ₂ /I ₁ . Therefore, gain control can be performed by changing either constant current I ₁ or I ₂ .

However, even in the gain control circuit shown in FIG. 2, since the bias voltage of the output terminal 14 is determined by the bias setting resistors 15 and 16, there is no ripple in the power supply voltage supplied to the power supply terminal 12. There is a drawback that when there is a voltage fluctuation such as, this fluctuation affects the output signal.

In view of these points, the present invention is designed to improve the influence of power supply voltage fluctuations on the output signal and to simplify the circuit configuration.

An embodiment of the output circuit of the differential amplifier of the present invention will be described below with reference to FIG. This third
In the figure, parts corresponding to those in FIG. 1 are designated by the same reference numerals, and detailed explanation thereof will be omitted.

In Figure 3, one side of the differential amplifier is shown.
A diode 11 is inserted into the collector current path of the npn transistor 1, and a collector-emitter path of the pnp transistor 13 is inserted into the collector current path of the other npn transistor 2 constituting this differential amplifier. The connection point between the collector and the diode 11 and the base of the transistor 13 are connected.

In addition, in the present invention, the common connection point of the collectors of transistors 2 and 13 is connected to a PNP whose base is grounded.
The emitter of this transistor 23 is connected to the power supply terminal 12 via a constant current source 24, and the emitter of this transistor 23 is connected to the power supply terminal 12 through a constant current source 24.
The collector of this transistor 23 is grounded via a load resistor 25, and the output terminal 14 is led out from the collector of this transistor 23. Also, in this example, the transistor 23
The base of transistor 2 and resistor 7
The bias circuit of transistor 2 is used as the bias circuit of transistor 23. In this case, since the transistor 23 has a grounded base amplification circuit configuration, it is sufficient that the transistor 23 supplies a bias voltage that operates in the active region, and the transistor 23 does not require a dedicated bias circuit. The rest of the structure is the same as in FIG.

In FIG. 3, the input signal source 10 provides (I ₁ −i ₁ ) and (I ₁ +i ₁ ) to transistors 1 and 2, respectively.
If the collector current flows through the diode 11
Since the transistor 13 and the transistor 13 constitute a current mirror circuit, a current of (I ₁ −i ₁ ) flows through the collector of the transistor 13, and therefore the transistor 13
A constant current source 24 is connected to the connection point of the collector of
and from the connection point of the emitter of transistor 23
A current of 2i ₁ is supplied, so this constant current source 24
When the constant current of I ₃ is ignored, if the base current of the grounded base transistor 23 is ignored, the load resistor 2
A current (I ₃ −2i ₁ ) flows through the output terminal 5, and a voltage corresponding to this current (I ₃ −2i ₁ ) is obtained at the output terminal 14. That is, in the configuration of the present invention, an output signal basically similar to that of the circuit configuration shown in _FIG . It has characteristics that can be determined accordingly.

As mentioned above, in the present invention, the output terminal 14
The bias voltage of the output signal obtained from constant current source 2
Since it is determined by the constant current I ₃ of 4, the power supply terminal 1
It is not affected by voltage fluctuations due to ripples or the like in the power supply voltage supplied to the circuit 2. In addition, since the present invention uses a grounded base transistor 23, it is only necessary to supply a bias voltage to the base of this transistor 23 so that this transistor 23 operates in the active region, and a dedicated bias circuit for this transistor 23 is required. There is no need to provide a , which has the advantage of simplifying the configuration.

FIG. 4 shows a gain control circuit using the output circuit of the differential amplifier circuit according to the present invention. In FIG. 4, parts corresponding to those in FIGS. 2 and 3 are designated by the same reference numerals, and detailed explanation thereof will be omitted. In FIG. 4, the respective collectors of transistors 1 and 2 are connected to the power supply terminal 12 through the collector-emitter paths of NPN transistors 18 and 19, each of which has a common bias voltage source 17 connected to its base. At the same time, the respective collectors of these transistors 1 and 2 are connected to the respective bases of NPN transistors 20 and 21 constituting a differential amplifier, respectively, and the mutual connection point of the emitters of these transistors 20 and 21 is connected to a constant current. The collector of the transistor 20 is connected to the power supply terminal 12 through the diode 11, and the collector of the transistor 21 is connected to the power supply terminal 12 through the collector-emitter path of the transistor 13. 13 is connected to the connection point between the diode 11 and the collector of the transistor 20, and the connection point of the collectors of each of the transistors 13 and 21 is connected to the connection point of the two PNP transistors 23.
a, 23b are connected to the emitters of a Darlington-connected pnp transistor 23, the emitters of this darlington-connected transistor 23 constitute a constant current source 24, and a pnp transistor 24 constitutes a current mirror circuit together with a diode 24b.
Power terminal 1 via the collector-emitter passage of a.
Connect to 2. In this example, the constant current source 24 is configured as follows. That is, this power supply terminal 12 is grounded through a series circuit of a resistor 24c and a Zener diode 24d for obtaining a predetermined constant voltage, and the connection point of this resistor 24c and Zener diode 24d is connected to the diode 24g through a resistor 24e. The base of this transistor 24f is grounded via a diode 24g, the emitter of this transistor 24f is grounded, and the collector of this transistor 24f is connected via a diode 24b. The connection point between the collector of this transistor 24f and the diode 24b is connected to the base of the transistor 24a. In this case transistor 24f
and the diode 24g constitute a current mirror circuit, and the transistor 24a and the diode 2
4b constitute a current mirror circuit, so that a constant current I ₃ can be passed through the transistor 24a by the Zener diode 24d.

Further, the collector of the transistor 23, that is, the connection point between the collectors of the transistors 23a and 23b, is grounded via the load resistor 25, and the output terminal 14 is led out from this collector, and the base of the common-base transistor 23 is biased. grounded via a voltage source 17, and this bias voltage source 17
so that they can be shared.

In FIG. 4, as in FIG. 2, the input signal source 10 supplies transistors 1 and 2 (I ₁ −i ₁ ).
When the collector currents of (I ₁ +i ₁ ) and (I 1 +i 1 ) flow respectively, and the collector currents of (I ₂ −i ₂ ) and (I ₂ +i ₂ ) flow through the transistors 20 and 21, the diode 1
1 and the transistor 13 form a current mirror circuit, a current of (I ₂ −i ₂ ) flows through the collector of the transistor 13, and therefore the collector of the transistor 24a is connected to the connection point between the collectors of the transistors 13 and 21, respectively. and transistor 23b
A current of 2i ₂ is supplied from the connection point of the emitter,
When the base current of the grounded base transistor 23 is ignored, a current of (I ₃ - 2i ₂ ) flows through the load resistor 25, and an output voltage corresponding to this current (I ₃ - 2i ₂ ) is obtained at the output terminal 14. It will be done. The gain G of the gain control circuit as shown in Fig. 4 is as in Fig. 2, G = R _L / R _E + r _e · I ₂ / I ₁ , and either the constant current I ₁ or I ₂ is changed. By this, gain control can be performed. Also in FIG. 4, the DC level of the output signal obtained at the output terminal 14 is controlled by the constant current source 2 independently of the previous stage configuration.
Since it is determined by the constant current I ₃ of 4, the power supply terminal 1
It is not affected in any way by voltage fluctuations due to ripples in the power supply voltage supplied to the circuit 2. Also in FIG. 4, there is no need to provide a special base bias circuit for the common base transistor 23, so the structure is simplified accordingly.

Furthermore, it goes without saying that the present invention is not limited to the above-described embodiments, and that various other configurations may be adopted without departing from the gist of the present invention.

[Brief explanation of the drawing]

Figure 1 is a connection diagram showing an example of the output circuit of a conventional differential amplifier, Figure 2 is a connection diagram showing an example of a gain control circuit using the example in Figure 1, and Figure 3 is a connection diagram of the differential amplifier of the present invention. FIG. 4 is a connection diagram showing an example of an output circuit. FIG. 4 is a connection diagram showing an example of a gain control circuit using the example shown in FIG. 1 and 2 are transistors forming a differential amplifier, 5 and 24 are constant current sources, 11 is a diode, 13 is an output extraction transistor, 14 is an output terminal, 23 is a common base transistor, and 25 is a load resistor. be.

Claims (1)

[Scope of utility model registration request] One npn transistor (or
A diode element is inserted into the collector current path of the other npn transistor (or pnp transistor), and the collector-emitter path of the output output pnp transistor (or npn transistor) is inserted into the collector current path of the other npn transistor (or pnp transistor). , connect the collector of the one transistor and the connection point of the diode element to the base of the output extraction transistor, and connect the common connection point of the collector of the other transistor and the output extraction transistor to the base common pnp type. A constant current source is connected to the emitter of the common base transistor, and the base of the common base transistor is connected to the base of the other transistor, and the output is taken out from the collector of the common base transistor. A differential amplifier output circuit characterized by: