JPS6323830U - - Google Patents

Info

Publication number
JPS6323830U
JPS6323830U JP11762986U JP11762986U JPS6323830U JP S6323830 U JPS6323830 U JP S6323830U JP 11762986 U JP11762986 U JP 11762986U JP 11762986 U JP11762986 U JP 11762986U JP S6323830 U JPS6323830 U JP S6323830U
Authority
JP
Japan
Prior art keywords
output signal
counter
count value
signal
converting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11762986U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP11762986U priority Critical patent/JPS6323830U/ja
Publication of JPS6323830U publication Critical patent/JPS6323830U/ja
Pending legal-status Critical Current

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  • Analogue/Digital Conversion (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本考案の一実施例のブロツク図、第
2図は、第1図の動作を表わす各部の波形図、第
3図は、入力波形図を表わす。
FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a waveform diagram of various parts representing the operation of FIG. 1, and FIG. 3 is an input waveform diagram.

Claims (1)

【実用新案登録請求の範囲】 クロツク信号をカウントし、該カウント値をデ
ジタル信号として出力するカウンタ手段と、 該カウンタの出力信号を入力し、アナログ信号
に変換するD/A変換手段と、該D/A変換手段
の出力信号と変換すべきアナログ信号とを比較す
る比較手段と、 該比較手段の出力信号によつて、前記カウンタ
手段のカウント値をラツチするラツチ手段と 該ラツチ手段に、ラツチした値と前記カウンタ
手段のカウント値とが一致したことを検出して、
前記比較手段に入力されているD/A変換手段の
出力信号に、所定の電圧を加算する電圧加算手段
とで構成されたことを特徴とするA/D変換器。
[Claims for Utility Model Registration] Counter means for counting clock signals and outputting the count value as a digital signal; D/A conversion means for inputting the output signal of the counter and converting it into an analog signal; a comparison means for comparing the output signal of the /A conversion means with an analog signal to be converted; a latch means for latching the count value of the counter means according to the output signal of the comparison means; detecting that the value matches the count value of the counter means,
An A/D converter comprising voltage adding means for adding a predetermined voltage to the output signal of the D/A converting means inputted to the comparing means.
JP11762986U 1986-07-30 1986-07-30 Pending JPS6323830U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11762986U JPS6323830U (en) 1986-07-30 1986-07-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11762986U JPS6323830U (en) 1986-07-30 1986-07-30

Publications (1)

Publication Number Publication Date
JPS6323830U true JPS6323830U (en) 1988-02-17

Family

ID=31003325

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11762986U Pending JPS6323830U (en) 1986-07-30 1986-07-30

Country Status (1)

Country Link
JP (1) JPS6323830U (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5475213A (en) * 1977-11-29 1979-06-15 Toshiba Corp Analogue input signal digital converter
JPS5613830A (en) * 1979-07-13 1981-02-10 Toshiba Corp Stabilizing circuit of a/d converter
JPS5787623A (en) * 1980-11-21 1982-06-01 Toshiba Corp A-d converter

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5475213A (en) * 1977-11-29 1979-06-15 Toshiba Corp Analogue input signal digital converter
JPS5613830A (en) * 1979-07-13 1981-02-10 Toshiba Corp Stabilizing circuit of a/d converter
JPS5787623A (en) * 1980-11-21 1982-06-01 Toshiba Corp A-d converter

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