JPS62150640U - - Google Patents
Info
- Publication number
- JPS62150640U JPS62150640U JP3842386U JP3842386U JPS62150640U JP S62150640 U JPS62150640 U JP S62150640U JP 3842386 U JP3842386 U JP 3842386U JP 3842386 U JP3842386 U JP 3842386U JP S62150640 U JPS62150640 U JP S62150640U
- Authority
- JP
- Japan
- Prior art keywords
- output signal
- input terminal
- conversion circuit
- input
- converter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims description 7
- 238000010586 diagram Methods 0.000 description 3
Description
第1図は、この考案による積算光量計のブロツ
ク図、第2図は従来の積算光量計のブロツク図、
第3図はV/Fコンバータの変換特性、第4図は
従来の積算光量計におけるI/V変換回路、V/
Fコンバータ及びカウンターの各出力信号の波形
図である。
図中、1:受光器、2:I/V変換回路、3:
V/Fコンバータ、4:コンパレータ、5:ゲー
ト、6:カウンター。
Figure 1 is a block diagram of the integrating light meter according to this invention, Figure 2 is a block diagram of a conventional integrating light meter,
Figure 3 shows the conversion characteristics of the V/F converter, Figure 4 shows the I/V conversion circuit in a conventional integrated light meter, and the V/F converter.
FIG. 3 is a waveform diagram of each output signal of an F converter and a counter. In the figure, 1: Photoreceiver, 2: I/V conversion circuit, 3:
V/F converter, 4: comparator, 5: gate, 6: counter.
Claims (1)
タと、ゲートと、カウンターとを順次備え、V/
Fコンバータと並列にコンパレータを設け、コン
パレータの一方の入力端子にI/V変換回路の出
力信号を、他方の入力端子に、I/V変換回路の
出力信号に含まれるノイズに比較して少し高い基
準電圧を入力し、ゲートの一方の入力端子にV/
Fコンバータの出力信号を、他方の入力端子にコ
ンパレータの出力信号を入力することを特徴とす
る積算光量計。 It is equipped with a photoreceiver, an I/V conversion circuit, a V/F converter, a gate, and a counter in order.
A comparator is provided in parallel with the F converter, and one input terminal of the comparator receives the output signal of the I/V conversion circuit, and the other input terminal receives the output signal of the I/V conversion circuit, which is slightly higher than the noise included in the output signal of the I/V conversion circuit. Input the reference voltage and set V/ to one input terminal of the gate.
An integrating light meter characterized in that the output signal of the F converter is input to the other input terminal, and the output signal of the comparator is input to the other input terminal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3842386U JPS62150640U (en) | 1986-03-18 | 1986-03-18 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3842386U JPS62150640U (en) | 1986-03-18 | 1986-03-18 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62150640U true JPS62150640U (en) | 1987-09-24 |
Family
ID=30850653
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3842386U Pending JPS62150640U (en) | 1986-03-18 | 1986-03-18 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62150640U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01179232U (en) * | 1988-06-08 | 1989-12-22 |
-
1986
- 1986-03-18 JP JP3842386U patent/JPS62150640U/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01179232U (en) * | 1988-06-08 | 1989-12-22 |
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