JPH01133825U - - Google Patents

Info

Publication number
JPH01133825U
JPH01133825U JP3025088U JP3025088U JPH01133825U JP H01133825 U JPH01133825 U JP H01133825U JP 3025088 U JP3025088 U JP 3025088U JP 3025088 U JP3025088 U JP 3025088U JP H01133825 U JPH01133825 U JP H01133825U
Authority
JP
Japan
Prior art keywords
resistor
capacitor
voltage source
ecl
cmos
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3025088U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP3025088U priority Critical patent/JPH01133825U/ja
Publication of JPH01133825U publication Critical patent/JPH01133825U/ja
Pending legal-status Critical Current

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  • Manipulation Of Pulses (AREA)
  • Logic Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例を示す回路図、第2
図は波形図、第3図は従来例を示す回路図である
。 1,2,3……抵抗器、4……ダイオード、5
……CMOS IC、6……ECL IC、7…
…コンデンサ。
Figure 1 is a circuit diagram showing one embodiment of the present invention, Figure 2 is a circuit diagram showing an embodiment of the present invention.
The figure is a waveform diagram, and FIG. 3 is a circuit diagram showing a conventional example. 1, 2, 3...Resistor, 4...Diode, 5
...CMOS IC, 6...ECL IC, 7...
...capacitor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] CMOS ICの出力端にダイオードのカソー
ドが接続され、このダイオードのアノードに第1
の抵抗器の一端が接続され、第1の抵抗器の一端
に第2の抵抗器の一端が接続され、第2の抵抗器
の他端に正電圧源が接続され、第1の抵抗器の一
端にコンデンサの一端が接続され、コンデンサの
他端に第1の抵抗器の他端が接続され、コンデン
サの他端に第3の抵抗器の一端が接続され、第3
の抵抗器の他端に負電圧源が接続され、第3の抵
抗器の一端にECL ICの入力端が接続された
レベル変換回路。
A diode cathode is connected to the output end of the CMOS IC, and the first
one end of the second resistor is connected to one end of the first resistor, a positive voltage source is connected to the other end of the second resistor, and one end of the first resistor is connected to one end of the second resistor. One end of the capacitor is connected to one end, the other end of the first resistor is connected to the other end of the capacitor, one end of a third resistor is connected to the other end of the capacitor, and the other end of the first resistor is connected to the other end of the capacitor.
A level conversion circuit in which a negative voltage source is connected to the other end of the third resistor, and an input end of the ECL IC is connected to one end of the third resistor.
JP3025088U 1988-03-07 1988-03-07 Pending JPH01133825U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3025088U JPH01133825U (en) 1988-03-07 1988-03-07

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3025088U JPH01133825U (en) 1988-03-07 1988-03-07

Publications (1)

Publication Number Publication Date
JPH01133825U true JPH01133825U (en) 1989-09-12

Family

ID=31255153

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3025088U Pending JPH01133825U (en) 1988-03-07 1988-03-07

Country Status (1)

Country Link
JP (1) JPH01133825U (en)

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