JPH01167730U - - Google Patents
Info
- Publication number
- JPH01167730U JPH01167730U JP6313388U JP6313388U JPH01167730U JP H01167730 U JPH01167730 U JP H01167730U JP 6313388 U JP6313388 U JP 6313388U JP 6313388 U JP6313388 U JP 6313388U JP H01167730 U JPH01167730 U JP H01167730U
- Authority
- JP
- Japan
- Prior art keywords
- level
- power supply
- gate
- collector
- ttl
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 2
Description
第１図は本考案によるレベル変換回路の一実施
例を示す回路図、第２図は従来のレベル変換回路
の一例を示す図である。
１……ＥＣＬレベル信号入力端子、２……ＥＣ
Ｌレベル信号入力端子、３……ＥＣＬゲート、４
……抵抗器、５……トランジスタ、６……トラン
ジスタ、７……抵抗器、８……抵抗器、９……抵
抗器、１０……抵抗器、１１……抵抗器、１２…
…抵抗器、１３……ツエナーダイオード、１４…
…ＴＴＬゲート（ＣＭＯＳゲート）、１５……出
力端子、１６……ダイオード。
FIG. 1 is a circuit diagram showing an embodiment of a level conversion circuit according to the present invention, and FIG. 2 is a diagram showing an example of a conventional level conversion circuit. 1...ECL level signal input terminal, 2...EC
L level signal input terminal, 3...ECL gate, 4
...Resistor, 5...Transistor, 6...Transistor, 7...Resistor, 8...Resistor, 9...Resistor, 10...Resistor, 11...Resistor, 12...
...Resistor, 13... Zener diode, 14...
...TTL gate (CMOS gate), 15...output terminal, 16...diode.
Claims (1)
ＣＬレベルの信号を入力し、他方のトランジスタ
のコレクタを負荷抵抗を介して電源に接続し、前
記コレクタの信号レベルをＴＴＬゲートまたはＣ
ＭＯＳゲートに入力してＴＴＬレベルまたはＣＭ
ＯＳレベルを得る構成のレベル変換回路において
、前記負荷抵抗に並列に、前記ＴＴＬゲートまた
はＣＭＯＳゲートへの供給電源電圧に等しいツエ
ナー電圧を有するツエナーダイオードを、そのカ
ソードが前記電源側に、そのアノードが前記コレ
クタ側になるように接続したことを特徴とするレ
ベル変換回路。 E at the base of one transistor of the differential amplifier
A CL level signal is input, the collector of the other transistor is connected to a power supply via a load resistor, and the signal level of the collector is connected to a TTL gate or C
Input to MOS gate to TTL level or CM
In a level conversion circuit configured to obtain an OS level, a Zener diode having a Zener voltage equal to the power supply voltage supplied to the TTL gate or CMOS gate is connected in parallel to the load resistor, and its cathode is on the power supply side and its anode is on the power supply side. A level conversion circuit characterized in that the circuit is connected to the collector side.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6313388U JPH01167730U (en) | 1988-05-13 | 1988-05-13 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6313388U JPH01167730U (en) | 1988-05-13 | 1988-05-13 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01167730U true JPH01167730U (en) | 1989-11-27 |
Family
ID=31288644
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6313388U Pending JPH01167730U (en) | 1988-05-13 | 1988-05-13 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01167730U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2013150180A (en) * | 2012-01-20 | 2013-08-01 | New Japan Radio Co Ltd | Level conversion circuit |
-
1988
- 1988-05-13 JP JP6313388U patent/JPH01167730U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2013150180A (en) * | 2012-01-20 | 2013-08-01 | New Japan Radio Co Ltd | Level conversion circuit |
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