JPS63106230U - - Google Patents

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Publication number
JPS63106230U
JPS63106230U JP20387686U JP20387686U JPS63106230U JP S63106230 U JPS63106230 U JP S63106230U JP 20387686 U JP20387686 U JP 20387686U JP 20387686 U JP20387686 U JP 20387686U JP S63106230 U JPS63106230 U JP S63106230U
Authority
JP
Japan
Prior art keywords
output
comparator
latch
measured
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20387686U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP20387686U priority Critical patent/JPS63106230U/ja
Publication of JPS63106230U publication Critical patent/JPS63106230U/ja
Pending legal-status Critical Current

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  • Analogue/Digital Conversion (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案の一実施例を示す回路図、第
2図は従来の一例を示す回路図である。 8……比較器、10……可変電圧発生器、13
……ラツチバツフア、15……マイクロコンピユ
ータ。
FIG. 1 is a circuit diagram showing an embodiment of this invention, and FIG. 2 is a circuit diagram showing a conventional example. 8... Comparator, 10... Variable voltage generator, 13
...Ratsuchibatshua, 15...Microcomputer.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 複数種の可変電圧を順次循環的に発生する可変
電圧発生器と、この可変電圧発生器の出力を片側
の入力とし他側の入力を被測定電圧とした比較器
と、前記可変電圧発生器の出力の変化が被測定電
圧とクロスした時の前記比較器の出力をラツチし
た記憶するラツチバツフアと、必要時にそのラツ
チバツフアのデータを取り出すとともにラツチを
解除するマイクロコンピユータとよりなることを
特徴とするアナログ・デジタル変換回路。
A variable voltage generator that sequentially and cyclically generates a plurality of types of variable voltages, a comparator with the output of the variable voltage generator as an input on one side and the input on the other side as the voltage to be measured; An analog device characterized by comprising a latch buffer that latches and stores the output of the comparator when a change in the output crosses the voltage to be measured, and a microcomputer that extracts data from the latch buffer and releases the latch when necessary. Digital conversion circuit.
JP20387686U 1986-12-25 1986-12-25 Pending JPS63106230U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20387686U JPS63106230U (en) 1986-12-25 1986-12-25

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20387686U JPS63106230U (en) 1986-12-25 1986-12-25

Publications (1)

Publication Number Publication Date
JPS63106230U true JPS63106230U (en) 1988-07-09

Family

ID=31169618

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20387686U Pending JPS63106230U (en) 1986-12-25 1986-12-25

Country Status (1)

Country Link
JP (1) JPS63106230U (en)

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