JPS62177130U - - Google Patents
Info
- Publication number
- JPS62177130U JPS62177130U JP6481986U JP6481986U JPS62177130U JP S62177130 U JPS62177130 U JP S62177130U JP 6481986 U JP6481986 U JP 6481986U JP 6481986 U JP6481986 U JP 6481986U JP S62177130 U JPS62177130 U JP S62177130U
- Authority
- JP
- Japan
- Prior art keywords
- outputs
- reference voltage
- generation circuit
- voltage generation
- selectively
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
Description
第１図は本考案に係わるＡ／Ｄ変換装置の一実
施例を示す系統図、第２図は第１図のシステムの
動作を説明するためのフローチヤートである。
１……基準電圧発生回路、２……マルチプレク
サ、３……減算回路、４……Ａ／Ｄ変換器、５…
…中央処理装置、６……プログラムメモリ。
FIG. 1 is a system diagram showing an embodiment of an A/D converter according to the present invention, and FIG. 2 is a flowchart for explaining the operation of the system shown in FIG. DESCRIPTION OF SYMBOLS 1... Reference voltage generation circuit, 2... Multiplexer, 3... Subtraction circuit, 4... A/D converter, 5...
...Central processing unit, 6...Program memory.
Claims (1)
と、この基準電圧発生回路で発生する複数ｎの基
準電圧のうちの１つを選択出力するマルチプレク
サと、この選択出力された基準電圧とアナログ入
力電圧との差を差電圧として出力する減算回路と
、この減算回路から出力された差電圧をデジタル
信号に変換するＡ／Ｄ変換器と、このＡ／Ｄ変換
器からのデジタル信号を読み込み制御信号を出力
する中央処理装置とを備えたことを特徴とするＡ
／Ｄ変換装置。 A reference voltage generation circuit that generates a plurality of n reference voltages, a multiplexer that selectively outputs one of the plurality of n reference voltages generated by the reference voltage generation circuit, and the selectively outputted reference voltage and an analog input voltage. a subtraction circuit that outputs the difference between A characterized in that it is equipped with a central processing unit that outputs
/D conversion device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6481986U JPS62177130U (en) | 1986-04-28 | 1986-04-28 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6481986U JPS62177130U (en) | 1986-04-28 | 1986-04-28 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62177130U true JPS62177130U (en) | 1987-11-10 |
Family
ID=30901324
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6481986U Pending JPS62177130U (en) | 1986-04-28 | 1986-04-28 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62177130U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03190324A (en) * | 1989-12-19 | 1991-08-20 | Ishida Scales Mfg Co Ltd | Double integration type analog/digital converter |
-
1986
- 1986-04-28 JP JP6481986U patent/JPS62177130U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03190324A (en) * | 1989-12-19 | 1991-08-20 | Ishida Scales Mfg Co Ltd | Double integration type analog/digital converter |
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