JPS63220572A - Transistor - Google Patents

Abstract

PURPOSE:To obtain a high-speed transistor at a low cost by a method wherein a base is not formed directly under an emitter bonding pad part. CONSTITUTION:A collector layer 2 composed of an n-type silicon epitaxial layer is formed on an n<+> type semiconductor substrate 1; p-type base layers 3 and n-type emitter layers 4 formed inside them are provided. Emitter electrodes 6 via openings at an oxide film 5, an emitter bonding pad part 16 following the electrodes and base electrodes 9 are formed on the surface; an emitter bonding wire 7 is bonded to the emitter bonding pad part 16. The base layers 3 and the emitter layers 4 are not formed directly under the emitter bonding pad part 16. Accordingly, a carrier can be sucked out quickly at a part other than the emitter bonding pad part 16 because the emitter layers 4 have been made fine. By this setup, a high-speed transistor is realized as a whole.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to transistors, and more particularly to transistors with high-speed switching capabilities.

[Conventional technology]

The switching characteristics of a transistor can be broadly divided into storage time (ts) and fall time (ts).
f), but the former can be shortened by introducing a lifetime killer, such as gold diffusion. latter t
In conventional technology, f is miniaturized using methods such as narrowing the emitter comb width, creating a multi-emitter structure, or using a mesh emitter structure.
They used methods such as speeding up tf.

The above-mentioned conventional technology is a technique for quickly extracting the injected carriers, and is aimed at shortening the distance between the base contact and the center of the emitter, that is, miniaturization. However, due to its structure, a transistor has an area for connecting bonding wires to draw current.
A bonding pad is required, which requires a fairly large area.Especially in the emitter, no matter how fine the other parts are, the bonding butt cannot be formed, so the tf is not as large as expected due to the influence of that part. It has the disadvantage that it cannot be shortened.

As a solution to this drawback, there is a transistor in which no emitter region is provided under the emitter bonding pad, as disclosed in Japanese Patent Application Laid-Open No. 59-132662. This is shown in FIG. 3(a), Φ). - Having a collector layer 2 of the same conductivity type on a semiconductor substrate 1 of the conductivity type, having a base layer 3 of another conductivity type within this collector layer 2, and further having a base layer 3 of another conductivity type within this base layer 3; It has 4 emitter layers.

The oxide film 5 on the surface has an opening for taking out the electrode, and the emitter electrode 6, the wire bonding part 16 of the emitter electrode, and the space electrode 9 are taken out through this opening. The emitter layer 4 is not formed under the wire bonding portion 16 of the emitter electrode. This eliminates the injection of carrier under the bonding pad section 16,
This speeds up the carrier loss time. however,
In reality, [the problem that the invention seeks to solve] However, in reality, the injected carriers are
Because it spread all at once, it was difficult to pull out carriers that had spread even with this structure, and only a certain degree of effectiveness could be expected.

[Means for solving problems]

The transistor of the present invention has a structure in which not only an emitter layer is not formed directly under the emitter bonding butt, but also a base layer itself is not formed, so that carriers injected into the paste can be extracted at high speed. Further, in a high-voltage transistor, the breakdown voltage can be compensated by forming an impurity layer independent of the base layer and the same impurity layer as the base layer in the part where the base layer is missing.

〔Example〕

Next, the present invention [C] will be explained in more detail with reference to the drawings.

FIG. 1 is a sectional view of the vicinity of emitter bonding in one embodiment of the present invention. A collector layer 2 made of an n-type silicon epitaxial layer is formed on an n+ type semiconductor substrate 1, a p-type base layer 3, and an n-type emitter layer 4 therein. The surface has an emitter electrode 6 through an opening in the oxide film 5, an emitter bonding pad portion 16 and a base electrode 9 connected thereto, and an emitter bonding wire 7 is bonded to the emitter bonding pad portion 6. has been done. The base layer 3 and emitter layer 4 are not formed directly under the emitter bonding butt portion 16. It is obvious that such a transistor can be manufactured using the same manufacturing method as a general transistor.

In the transistor of this embodiment, carriers can be sucked out quickly in the portion other than the emitter bonding butt portion 16 by making the emitter layer 4 finer. Since not only the emitter M4 but also the base layer 3 is not formed under the emitter bonding butt portion 16 (7), carrier injection and propagation do not occur in that portion as in the conventional case. Therefore, a high-speed transistor can be realized as a whole. Also, an emitter bonding wire 7 is placed in the missing part of the base layer 3.
Since a metal layer is formed by the bonding pad 16 for bonding, the withstand voltage is high in that area due to the field plate effect, and the withstand voltage as a transistor is determined by the outer periphery, so the withstand voltage deteriorates. There's nothing to do.

FIGS. 2(a) and 2(b) are sectional views focusing only on the area immediately below the emitter bonding butt of another embodiment of the present invention. These embodiments can positively compensate for the breakdown voltage relationship without impairing the effect of increasing the switching speed of the present invention, especially in high voltage transistors.

That is, in the collector layer 2 immediately below the emitter bonding pad portion 16 on which the base layer 3 is not formed, the withstand voltage compensation base layer 8 is formed separately and independently from the base layer 3 at the same time as the base layer 3 is formed. It is rare. Since this base layer 8 for breakdown voltage compensation is formed at the same time as the base layer 3,
It can be formed in the same process as a normal transistor manufacturing method without adding any additional steps. Moreover, the base layer 8 for voltage resistance compensation is shown in FIG.
) may be formed in a ring shape, or may be formed as one wide area as shown in FIG. 6(b). At this time, the distance between the base layer 3 and the base layer 8 for withstand voltage compensation is 10 to 20μ.
It is fine as long as it is a reasonable distance away.

〔Effect of the invention〕

As explained above, the present invention brings out the effects of conventional methods for increasing the speed of transistors, introducing a lifetime killer, and making fine batts by using a structure in which no base is formed directly under the emitter bonding butt. Moreover, since it can be manufactured using conventional manufacturing methods without requiring complicated steps, it is possible to provide an inexpensive and high-speed transistor.

[Brief explanation of the drawing]

FIG. 1 is a sectional view around the emitter bonding part of a transistor according to an embodiment of the present invention, and FIGS. 2(a) and (
b) shows other embodiments of the present invention, and in particular is a sectional view of a portion directly below the emitter bonding portion. Figure 3 (
A) and (b) are a plan view of a conventional transistor and a cross-sectional view thereof taken along the line A-A. 1... High concentration collector layer, 2... Collector layer, 3... Base layer, 4... Emitter layer, 5... Oxide film, 6...Emitter electrode, 7...Emitter bonding wire, 8
...Base layer for voltage resistance compensation, 9...Base electrode, 16...Emitter bonding pad portion.

Claims (1)

[Claims] 1. An island-shaped region of the collector region that does not form a base region is provided so as to be surrounded by the base region, the surface portion of which is coated with an insulating film, and an emitter electrode metal is further extended thereon. . A transistor characterized in that a bonding wire for an emitter electrode is attached to an extended portion of the emitter electrode metal. 2. Claim 1, characterized in that a layer having the same conductivity type as the base region is formed in the island-like region of the collector region in a form separate and independent from the base region.
Transistor described in section.