JPS63202928A - Production device for semiconductor - Google Patents

Production device for semiconductor

Info

Publication number
JPS63202928A
JPS63202928A JP62036266A JP3626687A JPS63202928A JP S63202928 A JPS63202928 A JP S63202928A JP 62036266 A JP62036266 A JP 62036266A JP 3626687 A JP3626687 A JP 3626687A JP S63202928 A JPS63202928 A JP S63202928A
Authority
JP
Japan
Prior art keywords
die pad
platen
wire bonding
trench
semiconductor element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62036266A
Other languages
Japanese (ja)
Other versions
JP2581054B2 (en
Inventor
Yukimitsu Ono
小野　如満
Sumio Ueno
上野　澄男
Yoichi Nishikawa
洋一 西川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP62036266A priority Critical patent/JP2581054B2/en
Publication of JPS63202928A publication Critical patent/JPS63202928A/en
Application granted granted Critical
Publication of JP2581054B2 publication Critical patent/JP2581054B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To absorb impact force and vibrations to a semiconductor element by a platen on wire bonding, and to bond a wire excellently by forming a recessed trench to the base edge section of a platen indentation section and positioning the recessed trench at a position where one part of the opening of the trench is blocked by a die pad. CONSTITUTION:A frame-shaped recessed trench 11 is shaped to the base edge section of an indentation section 6, and positioned at a position where one part of the opening of the trench is blocked by a die pad 5. Consequently, the die pad 5 for a lead frame 4 is fast stuck onto the base of the indentation section 6 on wire bonding, and can be housed into the indentation section 6. Accordingly, impact force and vibrations transmitted over the die pad 5 from a semiconductor element 7 call be absorbed by a platen 3, thus preventing the vibrations of the die pad 5, then excellently bonding wires.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、例えばワイヤボンディング工程で使用する半
導体製造装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor manufacturing apparatus used, for example, in a wire bonding process.

〔従来の技術〕[Conventional technology]

従来、この種の半導体製造装置は第３図および第４図に
示すように構成されている。これを同図に基づいて説明
すると、同図において、符号１で示すものはヒータ２を
内蔵するベースブロック、３はこのヘースブロソク１上
に固定されリードフレーム４のダイパッド５を収納可能
な凹陥部６を有するワイヤボンディング用のプラテンで
ある。Conventionally, this type of semiconductor manufacturing equipment has been constructed as shown in FIGS. 3 and 4. To explain this based on the same figure, in the same figure, the reference numeral 1 denotes a base block that houses the heater 2, and the reference numeral 3 denotes a concave portion 6 fixed on the Heasbrosock 1 and capable of housing the die pad 5 of the lead frame 4. This is a platen for wire bonding.

また、７は前記リードフレーム４のダイパッド５上に接
合された半導体素子、８はこの半導体素子７にＡｕ製の
ワイヤ９によって接続されたリードである。なお、前記
プラテン３の凹陥部６は放電加工によって形成される。Further, 7 is a semiconductor element bonded onto the die pad 5 of the lead frame 4, and 8 is a lead connected to this semiconductor element 7 by a wire 9 made of Au. Note that the concave portion 6 of the platen 3 is formed by electrical discharge machining.

このように構成された半導体製造装置においては、送り
装置（図示せず）によってリードフレーム４をプラテン
３に搬送した後、ワイヤ９によって半導体素子７とリー
ド８とを接続することによりワイヤボンディングを行う
ことができる。このとき、ダイパッド５がプラテン３の
凹陥部６内に収納されている。In the semiconductor manufacturing apparatus configured as described above, after the lead frame 4 is transported to the platen 3 by a feeding device (not shown), wire bonding is performed by connecting the semiconductor element 7 and the leads 8 using the wires 9. be able to. At this time, the die pad 5 is housed in the recess 6 of the platen 3.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

ところで、従来の半導体製造装置においては、プラテン
３の加工時に凹陥部６の底面縁部が放電加工治具の摩耗
によって第４図に矢印Ａで示すように曲面状に形成され
ることがあり、この場合ダイパッド５が凹陥部６の底面
とこの縁部に載置されることになって、ワイヤボンディ
ング時に半導体素子７に作用する衝撃力や振動（例えば
超音波等）によってダイパッド５も弾性振動し、良好な
ワイヤボンディングを行うことができないという問題が
あった。すなわち、ダイパッド５が凹陥部６の底面とこ
の縁部に載置されると、ダイパッド５とプラテン３との
間に間隙が形成されるため、半導体素子７からダイパッ
ド５に伝達される衝撃力や振動をプラテン３（ベースブ
ロック）によって吸収することができないからである。By the way, in conventional semiconductor manufacturing equipment, when processing the platen 3, the bottom edge of the concave portion 6 may be formed into a curved surface shape as shown by arrow A in FIG. 4 due to wear of the electric discharge machining jig. In this case, the die pad 5 is placed on the bottom surface and the edge of the recessed part 6, and the die pad 5 also vibrates elastically due to the impact force and vibration (for example, ultrasonic waves) that act on the semiconductor element 7 during wire bonding. However, there was a problem in that good wire bonding could not be performed. That is, when the die pad 5 is placed on the bottom surface and the edge of the recessed part 6, a gap is formed between the die pad 5 and the platen 3, so that the impact force transmitted from the semiconductor element 7 to the die pad 5 and This is because the vibration cannot be absorbed by the platen 3 (base block).

本発明はこのような事情に鑑みなされたもので、ワイヤ
ボンディング時に半導体素子に作用する衝撃力および振
動をプラテンによって吸収することができ、もってワイ
ヤボンディングを良好に行うことができる半導体製造装
置を提供するものである。The present invention has been made in view of the above circumstances, and provides a semiconductor manufacturing apparatus in which impact force and vibration acting on semiconductor elements during wire bonding can be absorbed by a platen, thereby allowing wire bonding to be performed satisfactorily. It is something to do.

〔問題点を解決するための手段〕[Means for solving problems]

本発明に係る半導体製造装置は、プラテン凹陥部の底面
縁部に凹溝を設け、この凹溝は開口一部がダイバンドに
よって閉塞される位置に位置付けられているものである
。In the semiconductor manufacturing apparatus according to the present invention, a groove is provided at the bottom edge of the platen recess, and the groove is positioned at a position where a portion of the opening is closed by the die band.

〔作　用〕[For production]

本発明においては、ワイヤボンディング時に凹陥部の底
面にリードフレームのダイパッドを密着させ凹陥部内に
収納することができる。In the present invention, during wire bonding, the die pad of the lead frame can be brought into close contact with the bottom surface of the recess and housed within the recess.

〔実施例〕〔Example〕

第１図は第２図のＩ−１断面図、第２図は本発明に係る
半導体製造装置を示す斜視図で、同図において第３図お
よび第４図と同一の部材については同一の符号を付し、
詳細な説明は省略する。同図において、符号１１で示す
ものは枠状の凹溝で、前記凹陥部６の底面縁部に設けら
れており、その開口一部が前記ダイパッド５によって閉
塞される位置に位置付けられている。FIG. 1 is a sectional view taken along line I-1 in FIG. 2, and FIG. 2 is a perspective view showing a semiconductor manufacturing apparatus according to the present invention. with
Detailed explanation will be omitted. In the figure, a frame-shaped groove indicated by reference numeral 11 is provided at the bottom edge of the recessed portion 6, and is located at a position where a portion of its opening is closed by the die pad 5.

このように構成された半導体製造装置においては、ワイ
ヤボンディング時に凹陥部６の底面にリードフレーム４
のダイパッド５を密着させ凹陥部６内に収納することが
できる。In the semiconductor manufacturing apparatus configured in this way, the lead frame 4 is placed on the bottom surface of the recess 6 during wire bonding.
The die pad 5 can be housed in the concave portion 6 in close contact with each other.

したがって、半導体素子７からダイパッド５に伝達され
る衝撃力や振動をプラテン３等によって吸収することが
できる。Therefore, the impact force and vibration transmitted from the semiconductor element 7 to the die pad 5 can be absorbed by the platen 3 and the like.

すなわち、本発明においては、プラテン３に対し凹溝１
１を設けることにより、−次加工によって形成される曲
面状の底面縁部を無くして、ワイヤボンディング時に発
生するダイパッド５の振動を防止することができるので
ある。That is, in the present invention, the groove 1 is formed on the platen 3.
1, it is possible to eliminate the curved bottom edge formed by secondary processing and prevent the vibration of the die pad 5 that occurs during wire bonding.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明によれば、プラテン凹陥部の
底面縁部に凹溝を設け、この凹溝は開口一部がダイパッ
ドによって閉塞される位置に位置付けられているので、
ワイヤボンディング時に凹陥部の底面にリードフレーム
のダイパッドを密着させ凹陥部内に収納することができ
る。したがって、半導体素子からダイパッドに伝達され
る衝撃力および振動をプラテンによって吸収することが
できるから、ダイパッドの振動を防止することができ、
ワイヤボンディングを良好に行うことができる。As explained above, according to the present invention, a groove is provided at the bottom edge of the platen recess, and this groove is positioned at a position where a portion of the opening is closed by the die pad.
During wire bonding, the die pad of the lead frame can be brought into close contact with the bottom surface of the recess and housed within the recess. Therefore, since the impact force and vibrations transmitted from the semiconductor element to the die pad can be absorbed by the platen, vibration of the die pad can be prevented.
Wire bonding can be performed well.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は第２図のＩ−■断面図、第２図は氷見−ζ　− 明に係る半導体製造装置を示す斜視図、第３図および第
４図は従来の半導体製造装置を示す斜視図と断面図であ
る。 ３・・・・プラテン、４・・・・リードフレーム、５・
・・・ダイパッド、６・・・・凹陥部、７・・・・半導
体素子、１１・・・・凹溝。 代　　理　　　人　　大　岩　増　雄 ６一FIG. 1 is a sectional view taken along I-■ in FIG. 2, FIG. 2 is a perspective view showing a semiconductor manufacturing apparatus according to Himi-ζ-M, and FIGS. 3 and 4 are perspective views showing conventional semiconductor manufacturing equipment. and a cross-sectional view. 3...Platen, 4...Lead frame, 5...
. . . die pad, 6 . . . recessed portion, 7 . . . semiconductor element, 11 . . . groove. Agent Masu Oiwa 61

Claims (1)

【特許請求の範囲】[Claims] 　リードフレームのダイパッドを収納可能な凹陥部を有
するワイヤボンディング用のプラテンを備えた半導体製
造装置において、前記凹陥部の底面縁部に凹溝を設け、
この凹溝は開口一部が前記ダイパッドによって閉塞され
る位置に位置付けられていることを特徴とする半導体製
造装置。In a semiconductor manufacturing apparatus equipped with a platen for wire bonding having a recessed part capable of accommodating a die pad of a lead frame, a recessed groove is provided at the bottom edge of the recessed part,
A semiconductor manufacturing apparatus characterized in that the groove is located at a position where a portion of the opening is closed by the die pad.
JP62036266A 1987-02-18 1987-02-18 Semiconductor manufacturing equipment Expired - Lifetime JP2581054B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62036266A JP2581054B2 (en) 1987-02-18 1987-02-18 Semiconductor manufacturing equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62036266A JP2581054B2 (en) 1987-02-18 1987-02-18 Semiconductor manufacturing equipment

Publications (2)

Publication Number Publication Date
JPS63202928A true JPS63202928A (en) 1988-08-22
JP2581054B2 JP2581054B2 (en) 1997-02-12

Family

ID=12464963

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62036266A Expired - Lifetime JP2581054B2 (en) 1987-02-18 1987-02-18 Semiconductor manufacturing equipment

Country Status (1)

Country Link
JP (1) JP2581054B2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55145047U (en) * 1979-04-02 1980-10-17
JPS59159947U (en) * 1983-04-11 1984-10-26 日本電気ホームエレクトロニクス株式会社 Semiconductor device manufacturing equipment

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55145047U (en) * 1979-04-02 1980-10-17
JPS59159947U (en) * 1983-04-11 1984-10-26 日本電気ホームエレクトロニクス株式会社 Semiconductor device manufacturing equipment

Also Published As

Publication number Publication date
JP2581054B2 (en) 1997-02-12

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